A low-power direct digital synthesizer using a self-adjusting phase-interpolation technique

Nosaka, Hideyuki; Yamaguchi, Yo; Yamagishi, A.; Fukuyama, Hidetoshi; Muraguchi, Masahiro

doi:10.1109/4.938379

Cited by 28 publications

(21 citation statements)

References 6 publications

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“…15 improving the SFDR by 27 dB. This result indicates that the presented technique results in a SFDR, which is comparable with other analog compensation approaches [24], but as it is not an integrated solution, it is more convenient and flexible. For investigations of the subsequent suppression of the unwanted spurs, the above mentioned filter stage is applied.…”

Section: B Results For Systems Using Short Division Factor Sequencessupporting

confidence: 59%

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Synthesis Concepts of Signals With High Spectral Purity for the Use in Impulse Radar Systems

Storch

Musch

2015

IEEE Trans. Instrum. Meas.

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This paper focuses on the synthesis of ultralow-noise signals for the use in a timebase of impulse radar systems. These systems are used in manifold applications and their accuracy is strongly dependent on the spectral purity of the timebase. Current systems use either phase-locked loops (PLLs) or direct digital synthesizers (DDSs). These PLLs comprise an excessive amount of components and recent DDSs still have a low spuriousfree dynamic range (SFDR). Therefore, this paper presents two new approaches for the direct synthesis. They are based on frequency dividers with both short division factor sequences and noise-shaping techniques. Ideas for spur avoidance and noise reduction are described to improve the noise behavior in terms of SFDR and phase noise. The presented approaches have been realized in hardware and measurement results are depicted. For the system using frequency dividers with short division factor sequences, the best results are a SFDR better than 117 dB at a signal frequency of 10.7 MHz. The phase noise level is below −140 dBc/Hz at offset frequencies greater than 1 kHz. Regarding the frequency dividers with noise-shaping techniques, no discrete spurious are visible. The phase noise level at offset frequencies greater than 7 kHz is below −150 dBc/Hz. These results are comparable with state-of-the-art PLL concepts and thus confirm the approaches.Index Terms-All-digital frequency synthesis, direct frequency synthesis, frequency divider, ground penetrating radar, impulse radar (GPR), phase noise, spurious-free dynamic range (SFDR), time-domain reflectometry (TDR), timebase.

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Section: B Results For Systems Using Short Division Factor Sequencessupporting

confidence: 59%

“…One approach for improving the spectral behavior is to compensate for the phase error and thus avoid the generation of spurious [22]- [24]. To get an insight into this approach, As can be observed, the figure shows the output signal, which would be the result of an ideal frequency divider dividing byN = 4.2 too.…”

Section: B Analog Compensation Of Phase Errormentioning

confidence: 99%

Synthesis Concepts of Signals With High Spectral Purity for the Use in Impulse Radar Systems

Storch

Musch

2015

IEEE Trans. Instrum. Meas.

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“…In a DPC the delay element is used to modify the period to adjust the output frequency (= 1/T ). In contrast, in a counter-based DFC the average frequency already has the right (average) value [37], and the role of the delay element is the correction of the deterministic jitter, bringing the instantaneous frequency (not simply the timeaveraged one) to the target. This ideally cancels the spurs in the output spectrum, thus acting as filtering (hence the name time-filtered square wave in [36]).…”

Section: Brief Overview On Dpcs and Dfcsmentioning

confidence: 99%

“…The counter, acting as phase accumulator, consists of an N −bit adder and an N −bit register, thus the operation is modulo 2 N . The M SB of the counter is a square wave that has on average the target output frequency [37]:…”

Section: Proposed Architecture a Pulse-output Dfcmentioning

confidence: 99%

Digital-to-Frequency Converters With a DTC: Theoretical Analysis of the Output SFDR

Palattella

Klumperink

Alink

et al. 2019

IEEE Trans. Circuits Syst. I

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In this paper we propose and analyze a Pulse-Output Digital-to-Frequency Converter (DFC) generating square waves, that uses a Digital-to-Time Converter (DTC) to correct the spurious tones (spurs) in the output spectrum. We focus on high-level architectural potential, discuss the design features of a DTC suitable for the proposed system and we explore possibilities and limits of this approach in terms of cleanness of the output spectrum. Behavioral model simulations confirm the theoretical analysis presented. Besides an analytical description of the output spurs, we derive a closed-form estimate of the worstcase spur, that leads to a simple design equation. This is useful to determine the DTC requirements (number of bits, Integral Non-Linearity (INL)) given a certain Spurious-Free Dynamic Range (SFDR) target. We show that the maximum spur strength, in dBc, depends exclusively on the ratio between the output frequency and the clock frequency and the DTC features (number of bits, INL and other impairments) and increases with the ratio by 6 dB per octave.

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“…Solutions have been proposed to compress ROM capacity (Vankka (2005), Nicholas & Samueli (1991)). The DDS considered here is known as a phase-interpolation DDS (Badets & Belot (2003), Nosaka et al (2001), Chen & Chiang (2004)) which consists of an N-bit variable slope digital integrator (adder and register), a 2-to-1 multiplexer (MUX), a digitally controlled phase interpolator (PI) and a pulse generator. In this type of DDS no ROM is used.…”

Section: Concept Of the Direct Digital Synthesizer (Dds)mentioning

confidence: 99%

Frequency Synthesizer Architectures for UWB MB-OFDM Alliance Application

Casha¹,

Grech²

2011

Ultra Wideband Communications: Novel Trends - System, Architecture and Implementation

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A low-power direct digital synthesizer using a self-adjusting phase-interpolation technique

Cited by 28 publications

References 6 publications

Synthesis Concepts of Signals With High Spectral Purity for the Use in Impulse Radar Systems

Synthesis Concepts of Signals With High Spectral Purity for the Use in Impulse Radar Systems

Digital-to-Frequency Converters With a DTC: Theoretical Analysis of the Output SFDR

Frequency Synthesizer Architectures for UWB MB-OFDM Alliance Application

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