A low power auto-reconfigurable pipelined ADC for implantable biomedical applications

Randall, Terence C.; Mahbub, Ifana; Islam, Syed K.

doi:10.1109/icsens.2013.6688455

Cited by 8 publications

(1 citation statement)

References 12 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The adopted modulation scheme in both is on-off-keying (OOK), whose BER is more immune-when envelope detection is implemented-to phase noise compared to other modulation schemes such as phase shift keying. The power consumptions in baseband circuits [14,15], LNA [8], and PA are given by…”

Section: Theoretical Analysismentioning

confidence: 99%

Optimum Design Parameters for Ultra-Low-Power RF Transceivers in Wireless Sensor Networks

Mahfouz

Meijerink

Bentum

2016

2016 IEEE Global Communications Conference (GLOBECOM)

View full text Add to dashboard Cite

In wireless sensor networks, the need for ultra-low power consuming nodes is one of the main motivations for research in such field. Because radio sections in sensor nodes contribute to a large extent to the overall power consumption, the focus of this study is on the RF transceiver. The aim is to reduce the average power consumption which depends significantly on the circuit architecture design, operating data rate, and duty cycle. In a symmetric communicating system, due to the tradeoff between transmitting power and receiver sensitivity on one hand, as well as between phase noise tolerance and power dissipation in local oscillators on the other hand, the design and operating parameters of the transceiver need to be determined from the perspective of the average power consumption. Therefore, in our study, as an initial step in system design, the optimum for instantaneous data rate, noise figure, and oscillator power budget are analytically determined. The analysis is carried out, taking into consideration an existing in-channel wideband interference, on two transceiver architectures: RF envelope detection and conventional heterodyne. The transceiver in both architectures employs on-off-keying modulation and duty cycling. The optimums are then calculated numerically based on design constants obtained from a frequently-cited RF envelope transceiver, indicating that an energy efficiency improvement of up to 5 dB can still be achieved.

show abstract

Section: Theoretical Analysismentioning

confidence: 99%

Optimum Design Parameters for Ultra-Low-Power RF Transceivers in Wireless Sensor Networks

Mahfouz

Meijerink

Bentum

2016

2016 IEEE Global Communications Conference (GLOBECOM)

View full text Add to dashboard Cite

show abstract

A low-power, reconfigurable, pipelined ADC for implantable bioimpedance measurement system with vertically aligned carbon nanofibers (VACNF) electrodes

Randall

Islam

Mahbub

et al. 2016

Analog Integr Circ Sig Process

View full text Add to dashboard Cite

Low-power column-parallel ADC for CMOS image sensor by leveraging spatial likelihood in natural scene

Liu

2014

IEEE SENSORS 2014 Proceedings

View full text Add to dashboard Cite

Column-Parallel analog-to-digital converter (ADC) technology has often been integrated in CMOS Image Sensors as a system-on-chip (SoC) solution, in particular for portable devices. Since the power consumption of column-parallel ADCs in CMOS image sensors play an important role in total power consumption, a low-power application on has been developed specifically for integration in low-power image systems.In a conventional column-parallel ADC design, the ADC operation is repeated row to row, column to column and frame to frame, regardless of the properties of the scenes.In this thesis, a new operating method is proposed, which takes into account spatial likelihood in natural scenes. In the proposed method, the MSBs of selected pixel would be predicted before the ADC operation, based on that pixel's neighbor pixels in the previous row. Because there is strong correlation between consecutive rows in most natural scenes, pre-ADC pixel estimation could save bits in ADC conversion cycles. The total number of ADC conversions would effectively be reduced, resulting in lower power consumption. This method was verified in extensive Matlab simulations, where ADC conversion cycles were reduced by up to 20%-30% for most natural scenes and a saving of up to 29.49% was achieved in switching energy for a 512×512 resolution Lena image. This thesis presents the design of a column-parallel low-power ADC system for a CMOS image sensor with the proposed algorithm. The system was implemented in AMS 0.35 µm CMOS technology. The study also details the simulation of the algorithm and the testing of the hardware. Improvements made to the algorithm after the analysis and testing of the CMOS imaging sensor are described at the end of the thesis. i I would like to express my sincerest gratitude to my Master program supervisor, Professor Chen Shoushun, for his insight of IC design, his research methodology and inspiring thinking, his steady encouragement and guidance throughout my two-year master study. The supervision and the systematic training provided by him really helped me on exploring out the system-level design of an image sensor and critical thinking on both top level and circuit level. Besides, I am really appreciate his trust on my research working and my working ability. I would also like to thank my seniors in this sensor group, Dr. Yuan Chao, Mr. Qian Xinyuan, Mr. Ding Ruoxi, Mr. Zhang Xiangyu for their assistance on brainstorm, continuous design review and the continuous help on image sensor testing. I want to give my special thanks to my another senior, Mr. Yu Hang, a research fellow in this sensor group, for his patiently guidance and meaningful suggestion given during my chip design.Lastly, I want to thank all of my friends, their friendship really make my two-year study be interesting, meaningful and special.

show abstract

A low power auto-reconfigurable pipelined ADC for implantable biomedical applications

Cited by 8 publications

References 12 publications

Optimum Design Parameters for Ultra-Low-Power RF Transceivers in Wireless Sensor Networks

Optimum Design Parameters for Ultra-Low-Power RF Transceivers in Wireless Sensor Networks

A low-power, reconfigurable, pipelined ADC for implantable bioimpedance measurement system with vertically aligned carbon nanofibers (VACNF) electrodes

Low-power column-parallel ADC for CMOS image sensor by leveraging spatial likelihood in natural scene

Contact Info

Product

Resources

About