A Low On-State Voltage and Saturation Current TIGBT With Self-Biased pMOS

Li, Ping; Lyu, Xinjiang; Cheng, Junji; Chen, Xingbi

doi:10.1109/led.2016.2614514

Cited by 12 publications

(12 citation statements)

References 7 publications

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“…The doping concentration of the N-cs (N ncs ) is still limited. In [15], [16], clamping the potential of nMOS's intrinsic drain with self-biased pMOS allows a further increasing N ncs and decreases the saturation current density, as the D ncs doesn't need to be completely depleted when sustaining high voltage.…”

Section: Introductionmentioning

confidence: 99%

Trench Shielded Planar Gate IGBT (TSPG-IGBT) With Self-Biased pMOS Realizing Both Low On-State Voltage and Low Saturation Current

Chen

2020

IEEE J. Electron Devices Soc.

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A novel trench shielded planar gate IGBT (TSPG-IGBT) with self-biased pMOS is proposed in this paper. It features a Player beneath the trench of the TSPG-IGBT to form a self-biased pMOS, which provides an additional path for the hole current and clamps the potential of the nMOS's intrinsic drain for lower saturation current. In the off-state, with the increasing potential of the N-cs (N-doped carrier store layer), the self-biased pMOS turns on and the potential of the Player will be clamped by the hole channel. Then, the reverse voltage is sustained by the P-layer/N-drift junction and the potential of the N-cs is shielded by the clamped Player region. Therefore, the N-cs can be heavily doped to reduce the on-state voltage (V on) without decreasing the breakdown voltage. Compared with the conventional TSPG-IGBT, the V on of the proposed TSPG-IGBT is reduced by 0.3 V at the current density of 200 A/cm 2 with the same turn-off loss. Besides, the saturation current density of the proposed one is decreased by 24%. INDEX TERMS Insulated gate bipolar transistor (IGBT), self-biased pMOS, on-state voltage, saturation current, turn-off loss.

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Section: Introductionmentioning

confidence: 99%

Trench Shielded Planar Gate IGBT (TSPG-IGBT) With Self-Biased pMOS Realizing Both Low On-State Voltage and Low Saturation Current

Chen

2020

IEEE J. Electron Devices Soc.

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“…V on of TIGBT could be further reduced by introducing a heavily doped N-type carrier stored layer (N-layer) [1]. Although V on decreases as the dose of the N-layer (D NL ) increases, D NL could not be too high due to it strongly affects the breakdown voltage (BV) [2][3][4][5]. In addition, in order to improve the short-circuit safe operating area, the saturation current of TIGBT needs to be decreased, which could be achieved by clamping the drain-to-source voltage (V DS ) of the trench nMOS [3,4,6].…”

mentioning

confidence: 99%

“…Although V on decreases as the dose of the N-layer (D NL ) increases, D NL could not be too high due to it strongly affects the breakdown voltage (BV) [2][3][4][5]. In addition, in order to improve the short-circuit safe operating area, the saturation current of TIGBT needs to be decreased, which could be achieved by clamping the drain-to-source voltage (V DS ) of the trench nMOS [3,4,6]. However, clamping V DS by depleting the N-layer or by a selfbiased pMOS would limit the value of D NL , and thus limit the further reduction in V on [3,6].…”

mentioning

confidence: 99%

“…In addition, in order to improve the short-circuit safe operating area, the saturation current of TIGBT needs to be decreased, which could be achieved by clamping the drain-to-source voltage (V DS ) of the trench nMOS [3,4,6]. However, clamping V DS by depleting the N-layer or by a selfbiased pMOS would limit the value of D NL , and thus limit the further reduction in V on [3,6]. Using the integrated diodes is effective in clamping V DS , but it is costly [4].…”

mentioning

confidence: 99%

“…4, it is clear that the trade-off relationships between the on-state voltage and the turn-off loss could be improved by increasing D NL . Although a higher value of D NL leads to higher plasma near the cathode side, the impact of the high plasma near the cathode side on turn-off loss is very small when compared to achieving the same on-state voltage by increasing the plasma in the anode side [2,3]. This is because the plasma near the cathode side can be quickly removed during the initial stage of the turn-off process.…”

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confidence: 99%

See 2 more Smart Citations

Low on‐state voltage and saturation current Trench Insulated Gate Bipolar Transistor with integrated Zener diode

Cheng

Chen

2017

Electron. lett.

Self Cite

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A novel Trench Insulated Gate Bipolar Transistor is proposed, where an integrated Zener diode is introduced. When the anode voltage becomes relatively high, the Zener diode could automatically clamp the potential of the carrier stored layer which locates beneath the base region of the active trench nMOS. Then in the blocking-state, the dose of the carrier stored layer could be as high as possible to reduce the on-state voltage without affecting the breakdown voltage. In the on-state, the drain-to-source voltage of the trench nMOS is also clamped, which helps to decrease the saturation current. Simulation results based on a 1.2 kV device show that, in comparison with the conventional one, the saturation current and the on-state voltage are decreased by 42.8 and 43.1%, respectively.

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Low-loss carrier-stored IGBT with p-type Schottky diode-clamped shielding layer

Zhao

Zhang

et al. 2021

J. Power Electron.

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A Low On-State Voltage and Saturation Current TIGBT With Self-Biased pMOS

Cited by 12 publications

References 7 publications

Trench Shielded Planar Gate IGBT (TSPG-IGBT) With Self-Biased pMOS Realizing Both Low On-State Voltage and Low Saturation Current

Trench Shielded Planar Gate IGBT (TSPG-IGBT) With Self-Biased pMOS Realizing Both Low On-State Voltage and Low Saturation Current

Low on‐state voltage and saturation current Trench Insulated Gate Bipolar Transistor with integrated Zener diode

Low-loss carrier-stored IGBT with p-type Schottky diode-clamped shielding layer

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