A low-noise small signal sensing scheme in voltage mode for high density magnetoresistive memories

Switched capacitor, self referencing sensing scheme for high density magneto-resistive memories

“…This must be a very low noise amplifier since the input signal is only 0.4mV. It is estimated a noise resistance of 2500 is ideal [9].…”

“…To obtain this low noise resistance the input transistors of the diffampl must have a size of at least 200/1.6 [9]. These large transistors have a large transconductance.…”

Digital design of a one megabit magneto-resistive memory incorporating efficient hardware fault tolerance

“…Because it is always desirable to compare with a stored zero, the dummies must be in the zero state. With the dual-phase sensing scheme, two separate dummy lines are needed to sense one selected bit, one which is zero for one polarity of sense current, and one which is zero for the opposite polarity of sense current [9,10].…”

“…Once this is determined, the dummy lines located in the opposite half data segment on the same rail will be accessed in sequence. Four sets of dummies are required to improve the impedance matching on both inputs of the first stage pre-amp [9,10]. With four sets of dummies, nearly identical matching is obtained, and little difference in signal levels will be seen between a data element and a dummy element.…”

“…the difference between these two sensing schemes. The details of this sensing scheme, including area considerations can be found in the doctoral dissertations of Manel Ranmuthu and Indumini Ranmuthu[9,10].…”