A Level Dependent Source Concoction Multilevel Inverter Topology with a Reduced Number of Power Switches

Jose, Sherin; Titus, S. S. K.

doi:10.6113/jpe.2016.16.4.1316

Cited by 24 publications

(8 citation statements)

References 27 publications

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“…The step creation capability of the proposed HCMLI has been compared with other structures with respect to the embedded switches. Toward this subject, some prominent multilevel inverters: The prelateship between N step and N switch for these structures: CHB 29,30,34,35 are presented as follows:

N_{italicswitch, ([], CHB)} = 2 ((), N_{step} - 1)

N_{italicswitch, ([], 29)} = ((), N_{step} + 3)

N_{italicswitch, ([], 30)} = \frac{true}{3} ((), N_{step} - 1)

N_{italicswitch, ([], 34)} = ((), N_{step} + 1)

N_{italicswitch, ([], 35)} = ((), N_{step} + 1)

…”

Section: Investigation and Validation Of Proposed Half‐cascaded Multilevel Invertermentioning

confidence: 99%

“…For the time being, different topologies have been introduced to create a high‐step staircase sinusoidal voltage 25‐27 . The power electronics experts have been endeavoring to suggest new topologies and renovate them to release conventional multilevel inverters' disadvantages 28‐30 . A bidirectional dc–dc converter for DVR is proposed to compensate the severe voltage sag/swell disturbances.…”

Section: Introductionmentioning

confidence: 99%

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Half‐cascaded multilevel inverter coupled to photovoltaic power source for AC‐voltage synthesizer of dynamic voltage restorer to enhance voltage quality

Falehi

2021

Int J Numerical Modelling

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Due to significant growth of the industrial companies and domestic electricity consumers along with appearance of the sensitive electrical and electronic equipment, the proper standard services have been more requested to provide high‐quality electrical energy. Dynamic voltage restorer (DVR) is a custom power electronic which is located in series with sensitive load and grid to mitigate the voltage sag and swell by injecting the relevant compensating voltage. High cost price of this compensator is related to its power supplies that it is replaced with renewable energy to make it cost‐effectiveness and eco‐friendly. Furthermore, the structure of multilevel inverter has a significant effect on providing high‐quality compensating voltage. In this paper, a novel HCMLI coupled to photovoltaic power source is proposed as AC‐voltage synthesizer for DVR to accurately compensate any voltage disturbances. Photovoltaic system can provide the required DC voltage with respect to voltage fluctuation range with low distortion. The step‐creation capability and cost‐effectiveness of the DVR based on proposed AC voltage synthesizer have been thoroughly evaluated. Feasibility of this multilevel inverter has correspondingly validated by the experimental results. Likewise, the performance of proposed DVR has been compared with conventional DVR and evaluated under different types of voltage disturbances. At last, the simulation results have confirmed the compensation capability of proposed DVR with proposed AC‐voltage synthesizer as compared with the conventional DVR to mitigate different sags and swells.

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N_{italicswitch, ([], CHB)} = 2 ((), N_{step} - 1)

N_{italicswitch, ([], 29)} = ((), N_{step} + 3)

N_{italicswitch, ([], 30)} = \frac{true}{3} ((), N_{step} - 1)

N_{italicswitch, ([], 34)} = ((), N_{step} + 1)

N_{italicswitch, ([], 35)} = ((), N_{step} + 1)

…”

Section: Investigation and Validation Of Proposed Half‐cascaded Multilevel Invertermentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Half‐cascaded multilevel inverter coupled to photovoltaic power source for AC‐voltage synthesizer of dynamic voltage restorer to enhance voltage quality

Falehi

2021

Int J Numerical Modelling

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“…Symmetrical structures: the relationships between number of switches embedded in CHB inverter, suggested inverter in other studies with respect to their created steps can be respectively written as follows:

N_{italicSwitch, ([], CHB)} = 2 ((), M_{Level} - 1),

N_{italicSwitch, ([], 35)} = ((), M_{Level} + 1),

N_{italicSwitch, ([], 36)} = ((), M_{Level} + 3),

N_{italicSwitch, ([], 37)} = \frac{true}{3} ((), M_{Level} - 1),

N_{italicSwitch, ([], 38)} = ((), M_{Level} + 1) .

…”

Section: Held Forth Cascaded Transformer‐based Odd‐nary Multilevel Inmentioning

confidence: 99%

Design and analysis of novel optimal harmonic elimination strategy based on MOPSO to obliterate low‐order harmonics of odd‐nary cascaded transformers‐based multilevel inverter

Falehi

Rafiee

2018

Math Methods in App Sciences

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Creating a high‐step staircase sinusoidal voltage taking into account of low number of switches is recognized as a significant challenge ahead of inventors of power electronics. This paper suggests a maiden cascaded transformer‐based multilevel inverter to effectively develop and solve the abovementioned challenge. Hence, via appending the bidirectional switches to the capacitors of submultilevel inverter as well as low‐frequency transformers, the proposed inverter structure can flexibly operate as so‐called “odd‐nary asymmetrical multilevel inverter.” From the perspective of low‐order harmonics produced by all inverter structures, apart from inverter type, it is essential that an effective strategy to be implemented to eliminate these harmonics. Toward this subject, kerf‐style Selective Harmonic Elimination Pulse Width Modulation (SHEPWM) has been scheduled as an optimization problem. Because of nature of multiobjective state of the problem, application of the multiobjective optimization technique is inevitable. Considering significant performance of Multi Objective Particle Swarm Optimization (MOPSO) for solving the nonlinear objectives, the elimination of fifth, seventh, and 11th harmonics is formulated by relevant fitness functions based on MOPSO. Putting it all together, the relevant analytical study accompanying both the simulation and experimental results has transparently verified the performance of the proposed multilevel inverter. Furthermore, elimination of all three designated low‐order harmonics, ie, fifth, seventh, and 11th harmonics using MOPSO‐based kerf‐style SHEPWM strategy has been well confirmed.

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“…Conversely, it suffers by the factors like more objectionable count on components and their related driver (gating) circuits. The component count waning has been accentuated by many recent researches [4][5][6]. This is the main reason why the MLI could not reach to remaining applications domain.…”

Section: Introductionmentioning

confidence: 99%

A Non-modular Matrix Structure for Component Count Waning in Multilevel Inversion

Chandrasekaran

Mohanty²

2021

J. Electr. Eng. Technol.

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Recently the matrix structure has become an astute converter topology for ac-ac power conversion systems. The supersession of the conventional two stage, back-to-back voltage source converters by the matrix arrangement of bi-directional semiconductor switches has rendered the merits such as single stage conversion, elimination of bulky dc-link electrolytic capacitors, improved input side performance matrices, increased power density etc. The matrix structure can be treated as a versatile structure, which has a straddling scope in power conversion systems such as multiport converters and multi level voltage source inverters. Albeit the multilevel inverter (MLI) structure is under a diligent research, still the component count waning is the thrust area. This paper attempts to exploit the matrix structure to arrive at a reduced switch count MLI topology. The idea of the suggested modified matrix structure MLI (MMSMLI) is involving switches in columns and separate DC sources (SDCs) in the row links, through which the addition and subtraction amid the SDCs are made easy in the asymmetrical operation, and hence the creation of more output levels are possible. In addition the introduction of the cross switching in the matrix structure helps in curtailing the number of switching devices in the current conduction path at almost all output voltage levels. The feasibility and operation of the MMSMLI are exemplified in MATLAB R2017b software using the pertinent multicarrier pulse width modulation. Further the corroboration is done from a proof-of-concept laboratory scale prototype. The results emboldened the usage of the MMSMLI for traction applications and other space constrained low and medium voltage applications.

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A Level Dependent Source Concoction Multilevel Inverter Topology with a Reduced Number of Power Switches

Cited by 24 publications

References 27 publications

Half‐cascaded multilevel inverter coupled to photovoltaic power source for AC‐voltage synthesizer of dynamic voltage restorer to enhance voltage quality

Half‐cascaded multilevel inverter coupled to photovoltaic power source for AC‐voltage synthesizer of dynamic voltage restorer to enhance voltage quality

Design and analysis of novel optimal harmonic elimination strategy based on MOPSO to obliterate low‐order harmonics of odd‐nary cascaded transformers‐based multilevel inverter

A Non-modular Matrix Structure for Component Count Waning in Multilevel Inversion

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