2019
DOI: 10.1007/978-3-030-27562-4_7
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A Latency-Optimized Hash-Based Digital Signature Accelerator for the Tactile Internet

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Cited by 6 publications
(2 citation statements)
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“…Hidar et al [1], which is our previous work, proposed physical unclonable function to ensure performances and security in the tactile internet; they proposed a mutual authentication protocol basing on the PUFs to resolve the www.ijacsa.thesai.org problem of security with guarantying the same latency, but this solution suffer from the problem of single point of failure (SPOF). Furthermore, Friedrich Pauls et al [23] propose a latencyoptimized accelerator for hash-based digital signature processing for the Extended Merkle signature scheme XMSS algorithm. Their architecture improves the latency of establishing sessions and the verification into the submillisecond range.…”
Section: Related Workmentioning
confidence: 99%
“…Hidar et al [1], which is our previous work, proposed physical unclonable function to ensure performances and security in the tactile internet; they proposed a mutual authentication protocol basing on the PUFs to resolve the www.ijacsa.thesai.org problem of security with guarantying the same latency, but this solution suffer from the problem of single point of failure (SPOF). Furthermore, Friedrich Pauls et al [23] propose a latencyoptimized accelerator for hash-based digital signature processing for the Extended Merkle signature scheme XMSS algorithm. Their architecture improves the latency of establishing sessions and the verification into the submillisecond range.…”
Section: Related Workmentioning
confidence: 99%
“…Tensilica processors are typically used in the design of I/O devices (e.g., NIC) and hardware accelerators in the form of new IS definitions and concurrent thread execution to implement softwarized NFs. The IS extensions have been utilized to accelerate hashing NFs [109], [110] and dynamic task scheduling [111]. Similar IS extensions have accelerated the complex network coding function [112], [113], [193] in a hardware design [114].…”
Section: ) Instruction Set Acceleration (Isacc)mentioning
confidence: 99%