A high throughput FFT processor with no multipliers

Abdullah, Shakeel S.; Nam, Haewoon; McDermot, Mark; Abraham, Jacob A.

doi:10.1109/iccd.2009.5413113

Cited by 24 publications

(12 citation statements)

References 14 publications

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“…† † : The rotation memory can be further reduced to 0 by using the angle generator in [16], instead of a rotation memory. [5], the proposed design reduces the number of slices due to the lower number of adders and multipliers. Compared to [4] the proposed design uses more slices but removes the needs for BRAMs and DSP blocks.…”

Section: Methodsmentioning

confidence: 99%

“…Alternatively, three real multipliers per rotator have been used at the cost of increasing the number of adders [3], [4]. Other previous designs propose multiplierless solutions that remove the overhead of the multipliers by only using shift-and-add operations for the rotators [5], [6]. The comparison shows that the proposed multiplierless unity-gain FFTs need the smallest number of adders among previous SDF FFT architectures.…”

Section: Proposed Unity-scaled Fft Architecturesmentioning

confidence: 99%

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Multiplierless Unity-Gain SDF FFTs

Garrido

Andersson

Qureshi

et al. 2016

IEEE Trans. VLSI Syst.

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Abstract-In this paper we propose a novel approach to implement multiplierless unity-gain SDF FFTs. Previous methods achieve unity-gain FFTs by using either complex multipliers or non-unity-gain rotators with additional scaling compensation. Conversely, this paper proposes unity-gain FFTs without compensation circuits, even when using non-unity-gain rotators. This is achieved by a joint design of rotators so that the entire FFT is scaled by a power of two, which is then shifted to unity. This reduces the amount of hardware resources of the FFT architecture, while having high accuracy in the calculations. The proposed approach can be applied to any FFT size and various designs for different FFT sizes are presented.

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Section: Methodsmentioning

confidence: 99%

Section: Proposed Unity-scaled Fft Architecturesmentioning

confidence: 99%

Multiplierless Unity-Gain SDF FFTs

Garrido

Andersson

Qureshi

et al. 2016

IEEE Trans. VLSI Syst.

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“…In the literature one can also find numerous publications that consider the implementation of single-stream FFTs in FPGAs, e.g. [1,5,17,19,25,26]. However, there has not been much research performed on the architectural level on FFT with the particular aspect of FPGA-mapping in consideration.…”

Section: Introductionmentioning

confidence: 99%

SFF—The Single-Stream FPGA-Optimized Feedforward FFT Hardware Architecture

Ingemarsson

Gustafsson

2018

J Sign Process Syst

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In this paper, a fast Fourier transform (FFT) hardware architecture optimized for field-programmable gate-arrays (FPGAs) is proposed. We refer to this as the single-stream FPGA-optimized feedforward (SFF) architecture. By using a stage that trades adders for shift registers as compared with the single-path delay feedback (SDF) architecture the efficient implementation of short shift registers in Xilinx FPGAs can be exploited. Moreover, this stage can be combined with ordinary or optimized SDF stages such that adders are only traded for shift registers when beneficial. The resulting structures are well-suited for FPGA implementation, especially when efficient implementation of short shift registers is available. This holds for at least contemporary Xilinx FPGAs. The results show that the proposed architectures improve on the current state of the art.

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“…Instead of storing actual twiddle factors in a ROM, the CORDIC-based FFT processor needs to store only the twiddle factor angles in a ROM for the butterfly operation. In recent years, several CORDIC-based FFT designs have been proposed for different applications (Abdullah et al, 2009;Lin & Wu, 2005;Jiang, 2007;Garrido & Grajal, 2007). In (Abdullah et al, 2009), non-recursive CORDIC-based FFT was proposed by replacing the twiddle factors in FFT architecture by non-iterative CORDIC micro-rotations.…”

Section: Multiplierless Fft Architectures Using Cordic Algorithmmentioning

confidence: 99%