SFF—The Single-Stream FPGA-Optimized Feedforward FFT Hardware Architecture

Ingemarsson, Carl; Gustafsson, Oscar

doi:10.1007/s11265-018-1370-y

Cited by 16 publications

(4 citation statements)

References 25 publications

(58 reference statements)

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“…The method based on the maximum function proves sufficient for most cases considered. The absence of floating-point calculations results in less computing power and the possibility of using hardware acceleration methods [33][34][35]. The CoG method allows for the increased resolution in the z-axis.…”

Section: Discussionmentioning

confidence: 99%

Focus Estimation Methods for Use in Industrial SFF Imaging Systems

Sioma,

Lenty

2024

Applied Sciences

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A Shape-From-Focus (SFF) is a three-dimensional imaging method based on focus information. It is not yet widely used for in-line industrial inspection or measurement tasks. The main reasons are the time it takes to capture a 3D image of the inspected product and the presence of interference affecting image quality. This paper compares operators for estimating focus in source images in the scope of their use in constructing an industrial 3D scanner. Interferences were introduced by using additional illuminators and changing the acquisition parameters. The use of industrial-grade cameras, industrial-grade illuminators, and electrically controlled optics are discussed. A novel approach in the research is using an electrically tunable lens to move the position of the image plane during 3D image acquisition. The research was conducted on various surfaces found on typical industrial products. The research showed which focus estimation operators can be applied to SFF imaging within the range of interference considered. It was also confirmed that using the centre of gravity method for scene reconstruction allows for an increase in resolution compared to the maximum method.

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Section: Discussionmentioning

confidence: 99%

Focus Estimation Methods for Use in Industrial SFF Imaging Systems

Sioma,

Lenty

2024

Applied Sciences

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“…The SFF FFT was presented in 2018 [47]. This serial architecture uses a small number of butterflies, rotators and multiplexers.…”

Section: Chronologymentioning

confidence: 99%

A Survey on Pipelined FFT Hardware Architectures

Garrido

2021

J Sign Process Syst

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The field of pipelined FFT hardware architectures has been studied during the last 50 years. This paper is a survey that includes the main advances in the field related to architectures for complex input data and power-of-two FFT sizes. Furthermore, the paper is intended to be educational, so that the reader can learn how the architectures work. Finally, the paper divides the architectures into serial and parallel. This classification puts together those architectures that are conceived for a similar purpose and, therefore, are comparable.

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“…In traditional Radix-2 SDF and MDC, the actual utilization of computing units is only 50%, which is reflected in both butterfliers and complex multipliers. In the SFF structure proposed by Carl et al [19], the utilization of butterfliers is increased to 100% by using the stage that trades adders for shift registers but at the cost of doubling the storage units. In the structure proposed by Mohammed et al [20], the multiplier utilization is increased to 100% by adding a data channel, but at the cost of doubling the butterfliers.…”

Section: Introductionmentioning

confidence: 99%

A Flexible-Channel MDF Architecture for Pipelined Radix-2 FFT

Zhou

Chen

et al. 2023

IEEE Access

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This paper proposes a flexible-channel multiple-path delay feedback (FC-MDF) pipelined fast Fourier transform architecture, which is based on Radix-2 FFT algorithm. The FC-MDF can be dynamically configured to accommodate two levels of FFT size. Different from the bypass structure that prevents the sequence data from passing through the preceding stages when the FFT size is reduced, the FC-MDF can be dynamically configured into single-channel mode when calculating larger size sequences, and into dualchannel mode when calculating smaller size sequences by taking advantage of the first stage 0and sharing of processing elements in subsequent stages. The proposed architecture increases the utilization of computing units, including butterfly and complex multiplier, from 50% to 100%, and provides twice the throughput in dual-channel mode, compared with the traditional Radix-2 single-path delay feedback (R2SDF) architecture. We implemented this structure on Xilinx FPGAs. The experimental results show that, compared with current SDF, the proposed FC-MDF significantly optimizes the proportion of resources when the FFT size is reduced.INDEX TERMS FFT (Fast Fourier transform), Pipelined architecture, Reconfigurable design, MDF (Multipath delay feedback)

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SFF—The Single-Stream FPGA-Optimized Feedforward FFT Hardware Architecture

Cited by 16 publications

References 25 publications

Focus Estimation Methods for Use in Industrial SFF Imaging Systems

Focus Estimation Methods for Use in Industrial SFF Imaging Systems

A Survey on Pipelined FFT Hardware Architectures

A Flexible-Channel MDF Architecture for Pipelined Radix-2 FFT

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