A gridless router for industrial design rules

Schiele,; Krüger,; Kirsch,

doi:10.1109/dac.1990.114929

Cited by 6 publications

(4 citation statements)

References 5 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…These obstacles can be most conveniently defined as a set of, possibly overlapping, rectangles at different layers . The layout design rules create an obstruction zone [27] around each obstacle where the center lines of wires and center of vias cannot be placed. That is, the center line of a wire of width must be at least away from the edge of the obstacle , where is the wire spacing between the current net and the obstacle .…”

Section: A Simplified Connection Graphmentioning

confidence: 99%

DUNE-a multilayer gridless routing system

Cong¹,

Fang

Khoo³

2001

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

Advances of very large scale integration technologies present two challenges for routing problems: 1) the higher integration of transistors due to shrinking of featuring size and 2) the requirement for off-grid routing due to the variable-width variable-spacing design rules imposed by optimization techniques. In this paper, we present a multilayer gridless detailed routing system for deep submicrometer physical designs. Our detailed routing system users a hybrid approach consisting of two parts: 1) an efficient variable-width variable-spacing detailed routing engine and 2) a wire-planning algorithm providing high-level guidance as well as ripup and reroute capabilities. Our gridless routing engine is based on an efficient point-to-point gridless routing algorithm using an implicit representation of a nonuniform grid graph. We proved that such a graph guarantees a gridless connection of the minimum cost in multilayer variable-width and variable-spacing routing problem. A novel data structure using a two-level slit tree plus interval tree in combination of cache structure is developed to support efficient queries into the connection graph. Our experiments show that this data structure is very efficient in memory usage while very fast in answering maze expansion related queries. Our detailed routing system also features a coarse grid-based wire-planning algorithm that uses exact gridless design rules (variable-width and variable-spacing) to accurately estimate the routing resources and distribute nets into routing regions. The wire-planning method also enables efficient ripup and reroute in gridless routing. Unlike previous approaches for gridless routing that explore alternatives of blocked nets by gradually tightening the design rules, our planning-based approach can take the exact gridless rules and resolve the congestion and blockage at a higher level. Our experimental results show that using the wire-planning algorithm in our detailed routing system can improve the routability and also speed up the runtime by 3 to 17 times.

show abstract

Section: A Simplified Connection Graphmentioning

confidence: 99%

DUNE-a multilayer gridless routing system

Cong¹,

Fang

Khoo³

2001

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

show abstract

“…Previous works in detailed routing have considered the interaction of vias with other objects [4], [5] but not between vias within the same route. The problem of design rule interactions within the same route has been acknowledged in [4] but not solved except for some easily identifiable special cases.…”

Section: Problem Formulationmentioning

confidence: 99%

“…The problem of design rule interactions within the same route has been acknowledged in [4] but not solved except for some easily identifiable special cases. Notice that the routers in [4], [5] are actually gridless routers using area expansion. This is so because early gridded routers have used a large enough grid spacing and evaded the via-spacing problems.…”

Section: Problem Formulationmentioning

confidence: 99%

Via design rule consideration in multilayer maze routing algorithms

Cong

Fang

Khoo

2000

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

Maze routing algorithms are widely used for finding an optimal path in detailed routing for very large scale integration, printed circuit board and multichip modules In this paper, we show that finding an optimal route of a two-pin net in a multilayer routing environment under practical via design rules can be surprisingly difficult. A straightforward extension to the maze routing algorithm that disallows via-rule incorrect routes may either cause a suboptimal route to be found, or more seriously, cause the failure to find any route even if one exists. We present a refined heuristic to this problem by embedding the distance to the most recently placed via in an extended connection graph so that the maze routing algorithm has a higher chance of finding a via-rule correct optimum path in the extended connection graph. We further present efficient data-structures to implement the maze routing algorithm without the need to preconstruct the extended connection graph. Experimental results confirmed the usefulness of our algorithm and its applicability to a wide range of CMOS technologies.

show abstract

“…Most analog routers adopt the gridless routing model because of its capability of dealing with variable wire width and spacing rules [11][12][13][14][15][18][19]. Generally, the gridless routing model can be categorized into two classes according to different representations of the routing region: (1) implicit-connection-graph-based model, and (2) tile-based model.…”

Section: Introductionmentioning

confidence: 99%

A new splitting graph construction algorithm for SIAR router

Zhao

Yao

Cai

et al. 2013

2013 IEEE 10th International Conference on ASIC

View full text Add to dashboard Cite

With the increasing need of the SoC (System on a Chip) design automation tools, analog routing is attracting more and more attention. An interactive analog router called SIAR based on splitting graph model was presented in [15]. Based on SIAR, this paper presents a new splitting graph construction (SGC) algorithm to speed up the graph construction process, and thus speed up the whole analog routing process. The presented SGC algorithm has the following features: (1) auxiliary points are added according to the obstacles' corner points, (2) there is no need to construct all the grids along the boundaries of the expanded obstacles, (3) a fast polygon-to-rectangle conversion algorithm is adopted to directly construct the splitting tiles needed by the splitting graph. Experimental results are promising and show 2× speedup on average.

show abstract

A gridless router for industrial design rules

Cited by 6 publications

References 5 publications

DUNE-a multilayer gridless routing system

DUNE-a multilayer gridless routing system

Via design rule consideration in multilayer maze routing algorithms

A new splitting graph construction algorithm for SIAR router

Contact Info

Product

Resources

About