A gigabit multidrop serial backplane for high-speed digital systems based on asymmetrical power splitter

Abstract

The maximum data rate in today's available multidrop backplanes is significantly limited due to signal integrity concerns. In this brief, a novel gigabit multidrop serial link configuration for high-speed digital systems based on newly developed asymmetrical broadband power splitters with matching trace impedance, is presented. The proposed power splitter features good impedance match at all ports without the insertion losses being inherent to common resistive power splitters. Experimental results obtained from implemented prototypes demonstrate a satisfactory operation of the proposed multidrop serial backplane for a data rate above 3.5 Gbps.

Package test interface fixture considering low cost solution, high electrical performance, and compatibility with fine pitch packages

“…The point-to-multipoint parallel connection can be realized through a passive signal splitter which results in the achievement of the test cost reduction [2]. However, this causes fabrication failures due to the number of layers on PCB.…”

Hardware implementation of a scheduler for high performance switches with quality of service (QoS) support

“…A gigabit multidrop backplane is presented in [15]. This backplane is based on broadband power splitters that accept an input signal and deliver multiple output signals with specific phase and amplitude characteristics, while maintaining a good impedance match at all ports.…”

GMDS

“…In [10], a new lossless asymmetrical broadband power splitter configuration with matching trace impedance was introduced as the basis for a gigabit multidrop serial link. The basic configuration of this power splitter consists of an internal bifurcated transmission line in which the characteristic impedances of each bifurcation, Z 1 and Z 2 , must enforce Z 0 = Z 1 //Z 2 , with Z 0 being the characteristic impedance of the source transmission line.…”