A generic model for cluster tool throughput time and capacity

Wood, S.C.; Tripathi, Satish K.; Moghadam, F.

doi:10.1109/asmc.1994.588245

Cited by 23 publications

(10 citation statements)

References 2 publications

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“…Since it is a closed-type tool, exposure to contamination can be remarkably decreased and the cycle time may be reduced because it allows diverse wafer transfer patterns (or recipes). Also, it is relatively easy to control many fabrication parameters to improve the yield (Wood, Tripathi, and Moghadam 1994). Cluster tools in semiconductor manufacturing have been increasingly used for various wafer fabrication processes including photolithography, etching, chemical vapor deposition (CVD), physical vapor deposition (PVD), cleaning, thermal processing, and photoresist strip, which amount to almost 90% of entire wafer fabrication processes.…”

Section: Cluster Tool and Related Workmentioning

confidence: 99%

A real-time scheduling method for the cluster tool with wafer transfer delay

Lim

Park

Lee

et al. 2013

International Journal of Production Research

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In this study, we propose an effective real-time scheduling method based on the timetabling technique for the cluster tool. Instead of considering the no-wait assumption generally adopted in almost all of the previous literature, we take wafer transfer delay into consideration, which implies that a wafer can stay at the current chamber for a certain, limited time before proceeding to the next chamber. In order to improve the total cycle time, an additional pulling procedure to the timetabling is introduced and applied. Numerical examples show that the proposed method gives effective schedules in real time even for practical-sized problems.

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Section: Cluster Tool and Related Workmentioning

confidence: 99%

A real-time scheduling method for the cluster tool with wafer transfer delay

Lim

Park

Lee

et al. 2013

International Journal of Production Research

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“…The second term varies with lot size by the constant of proportionality , known as the tool takt time, incremental cycle time [10], [15], [16], [18], [19] or fundamental period [12], [13]. It is the mean time between wafer completions if ample WIP is available and is a function of both and .…”

Section: B Cluster Tool Dynamics Under Perfect Reliabilitymentioning

confidence: 99%

Systems of multiple cluster tools: configuration, reliability, and performance

Lopez

Wood

2003

IEEE Trans. Semicond. Manufact.

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The migration of semiconductor processes to singlewafer vacuum cluster tools has rendered configuration an important decision variable in fab operation and heightened the impact of reliability on fab performance. We address these closely linked issues by deriving the optimal configuration and operation of systems of cluster tools in the presence of scheduled maintenance.The two extremes in the spectrum of possible configurations are the serial configuration, in which the modules in a tool are all different, each representing a step in a process sequence, and the parallel configuration, in which each tool is assigned only one process step. We predict that the latter can offer higher throughputs. However, this advantage may be slight when equipment downtime is relatively schedulable and infrequent, in which the case the serial configuration may be preferable because of its superior cycle times. We also derive optimal lot sizing and release policies for systems of cluster tools. We conclude that fabs will gradually migrate from parallel configurations to serial as cluster tools become more reliable and cycle time becomes more important.Index Terms-Flexible manufacturing systems, manufacturing planning, manufacturing scheduling, performance models, semiconductor cluster tools, semiconductor device manufacture.

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“…As the lot size decreases, the 9-min loadlock time will not change but the time to process the lot on the modules will decrease. Thus the tool's maximum throughput rate decreases if the lot size falls below a certain threshold [5], [30]. When the lot size falls below this threshold additional integrated tools would be required to maintain the original throughput rate.…”

Section: B Lot Sizementioning

confidence: 99%

Cost and cycle time performance of fabs based on integrated single-wafer processing

Wood

1997

IEEE Trans. Semicond. Manufact.

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Visions of future wafer fabs include the use of integrated single-wafer processors to achieve fast cycle times and contain rising production costs. A survey of IC manufacturers, equipment vendors, and IC manufacturing literature was used to generate hypothetical conventional and alternative fabs to evaluate the effect of integrated single-wafer processing on cycle time and cost performance. The distinguishing features of the alternative fab are 1) all thermal processes performed on singlewafer processors; 2) back-end wet cleans performed on singlewafer processors; 3) integration of single-wafer processors into clusters or cells wherever practical, and 4) extensive use of insitu insitu insitu process monitors to replace in-line process monitors. Modeling and simulation of the resulting fabs suggest that integrated singlewafer processing can reduce the cycle time of conventional fabs by about 50% without having a significant effect on wafer production cost. Tool integration and single-wafer processing must be used together to achieve these performance improvements. Although traditional lot sizes appeared to be appropriate for both fabs, improvements in cluster tool reliability and process step similarity could change optimal integrated tool configurations and reduce optimal lot sizes in the future.

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A generic model for cluster tool throughput time and capacity

Cited by 23 publications

References 2 publications

A real-time scheduling method for the cluster tool with wafer transfer delay

A real-time scheduling method for the cluster tool with wafer transfer delay

Systems of multiple cluster tools: configuration, reliability, and performance

Cost and cycle time performance of fabs based on integrated single-wafer processing

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