A fully integrated 2.6 GHz cascode class-E PA in 0.25 µm CMOS employing new bias network for stacked transistors

Kreissig, Martin; Kostack, Robert; Plíva, Jan; Paulo, Robert; Ellinger, Frank

doi:10.1109/lamc.2016.7851280

Cited by 7 publications

(5 citation statements)

References 6 publications

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“…Table summarizes the comparison results between DSBB PA and the existing works which focus on the improvement of switching characteristic . It can be seen that the proposed DSBB PA shows an excellent performance in terms of efficiency.…”

Section: Measurement Resultsmentioning

confidence: 98%

“…In recent years, many efforts have been paid on improving efficiency by optimizing the transistor switching performance, such as a finite on‐resistance analyzing, using mode‐locking technique to mitigate the on‐resistance and power loss, adopting auxiliary discharge paths to accelerate switching transistor turn‐off, shaping the drain output of switching transistors by reactive components to retain class‐E‐like voltage waveforms at the lower and upper switching transistors, and so forth. However, above research studies focus on either the improvement of on‐resistance or the enhancement of the switching transition characteristic.…”

Section: Introductionmentioning

confidence: 99%

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A differential class‐E power amplifier with dynamic body bias technique

Wang

et al. 2019

Micro & Optical Tech Letters

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A fully differential class‐E power amplifier (PA) for wireless body area network applications is presented in this article. A novel dynamic self‐adapting body bias (DSBB) technique is introduced to improve the switch‐on transition and on‐resistance characteristics of MOS transistors. The proposed circuit is fabricated in the TSMC 0.18‐μm RF CMOS process. Measurement results show that the DSBB PA achieves a power‐added efficiency (PAE) of 46.9% with an output power of 13.1 dBm at 900 MHz. Compared to the conventional body‐ground connection PA, PAE and output power are improved more than 6.6% and 4.2 mW, respectively.

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Section: Measurement Resultsmentioning

confidence: 98%

Section: Introductionmentioning

confidence: 99%

A differential class‐E power amplifier with dynamic body bias technique

Wang

et al. 2019

Micro & Optical Tech Letters

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“…The hypothesis of this decrease is that it could be due to the skin effect which results in a higher series resistance at higher frequencies as well as the parasitic drain capacitance but investigation are still ongoing. The following Figure-of-Merit (FoM) [21] is used to compare the performance of the designed chip with state-of-the-art CMOS switch-mode PAs (SMPAs) [21][22][23][24][25][26][27][28]: Due to its high efficiency (PAE = 70%) as shown in Figure 8 and compact size (die area = 0.21 mm 2 ) including the I/O pads, the proposed design methodology implemented on this work, has a FoM of 735, which is the highest among all designs in comparison as shown in Table 2.…”

Section: Measurement Resultsmentioning

confidence: 99%

A Design Methodology and Analysis for Transformer-Based Class-E Power Amplifier

et al. 2019

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This paper proposes a new technique and design methodology on a transformer-based Class-E complementary metal-oxide-semiconductor (CMOS) power amplifier (PA) with only one transformer and two capacitors in the load network. An analysis of this amplifier is presented together with an accurate and simple design procedure. The experimental results are in good agreement with the theoretical analysis. The following performance parameters are determined for optimum operation: The current and voltage waveform, the peak value of drain current and drain-to-source voltage, the output power, the efficiency and the component values of the load network are determined to be essential for optimum operation. The measured drain efficiency (DE) and power-added efficiency (PAE) is over 70% with 10-dBm output power at 2.4 GHz, using a 65 nm CMOS process technology.

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“…In the case of two-stage class-E PAs [17], the interstage network can be designed to provide input harmonic wave-shaping for a more squared waveform that controls the transistor operating as a switch. [32], with up to 1W of output power level in the 1-2GHz range. The millimeter-wave PA described in [21] demonstrates a CMOS IC at 93 GHz with PAE>40%, showing that Sokal's class-E concept can be extended to extremely high frequencies, Fig.…”

Section: Microwave Class-e Amplifiersmentioning

confidence: 99%

Microwave Class-E Power Amplifiers: A Brief Review of Essential Concepts in High-Frequency Class-E PAs and Related Circuits

Popović

Garcia

2018

IEEE Microwave

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Scaling class-E operation to higher frequencies presents a number of challenges. The most obvious is the maximum frequency of class-E operation derived for the ideal class-E circuit as: , ≅ /(56.5). (1) where Imax is the maximum drain-to-source current of the switching device and Vds its drain-tosource biasing voltage. The transistor output capacitance COUT limits the frequency range of class-E operation, as does the drain-to-source voltage which implies lower output power. COUT can be de-embedded from a nonlinear model or measured large-signal parameters and used as a part of the output matching circuit. The class-E mode of operation is defined by the time-domain waveforms for a 50% duty cycle and assuming soft switching (both voltage and the derivative of

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A fully integrated 2.6 GHz cascode class-E PA in 0.25 µm CMOS employing new bias network for stacked transistors

Cited by 7 publications

References 6 publications

A differential class‐E power amplifier with dynamic body bias technique

A differential class‐E power amplifier with dynamic body bias technique

A Design Methodology and Analysis for Transformer-Based Class-E Power Amplifier

Microwave Class-E Power Amplifiers: A Brief Review of Essential Concepts in High-Frequency Class-E PAs and Related Circuits

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