A full-HD 60fps AVS/H.264/VC-1/MPEG-2 video decoder for digital home applications

Chen, Ju; Chang, Yung-Chang; Cheng, Chia-Yun; Wang, Chih–Ming; Lin, Hue-Min; Chen, Chun-Chia; Chiu, Fred; Wang, Sheng-Jen

doi:10.1109/vdat.2011.5783591

Cited by 8 publications

(7 citation statements)

References 5 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In [30], another JPEG encoder is implemented for images where the quantization block is designed using multiplication and shift operation instead of division. The design in [31] describes a multi standard video decoder to support four codecs -AVS, H.264, VC-1 and MPEG-2. Silicon Image Inc. currently supplies a Multi-standard High-Definition Video Decoder (MSVD-HD) core that supports H.264, VC-1, and MPEG-1/2 codecs [32].…”

Section: Previous Workmentioning

confidence: 99%

See 1 more Smart Citation

A Cost-Shared Quantization Algorithm and Its Implementation for Multi-Standard Video Codecs

Das

Wahid

2013

Circuits Syst Signal Process

View full text Add to dashboard Cite

The current trend of digital convergence creates the need for the video encoder and decoder system, known as codec in short, that should support multiple video standards on a single platform. In a modern video codec, quantization is a key unit used for video compression. In this thesis, a generalized quantization algorithm and hardware implementation is presented to iii ACKNOWLEDGMENTSThe work presented in this thesis has been carried out at the

show abstract

Section: Previous Workmentioning

confidence: 99%

“…To calculate the cost of shared implementation, the cost for MC, IP, and VLD units are taken from the shared design presented in [31]. The cost for IT (for shared design) is taken from our previous work [15], and the cost for IQ is taken from the current work.…”

Section: Estimated Area Savings In Multi-codec Decodermentioning

confidence: 99%

A Cost-Shared Quantization Algorithm and Its Implementation for Multi-Standard Video Codecs

Das

Wahid

2013

Circuits Syst Signal Process

View full text Add to dashboard Cite

show abstract

“…In order to better assess the saving in hardware for the entire decoder, we have done a cost analysis as presented in Figure 7 where the costs of standalone and shared design are shown. The cost of a decoder for four codecs (H.264, VC-1, AVS, MPEG2/4) is taken from [14]. The cost of JPEG codec is taken from [24] and added with the previous to calculate the total cost for all five codecs.…”

Section: Estimated Area Saving In a Multicodecmentioning

confidence: 99%

“…Here, MC is motion compensation, IP is intra prediction, VLD is variable length decoder, IQ is inverse quantization, and IT is inverse transform. To calculate the hypothetical cost of shared implementation, we have used the implementation cost for MC, IP, and VLD units from the shared design presented in [14]. Then the cost for IT (for shared design taken from our previous work [1]) and the cost for IQ (taken from the current work) are added.…”

Section: Estimated Area Saving In a Multicodecmentioning

confidence: 99%

“…In [13], another JPEG encoder is implemented for images where the quantization block is designed using multiplication and shift operation instead of division. The design in [14] describes a multistandard video decoder to support four codecs-AVS, H.264, VC-1, and MPEG-2. Silicon Image Inc. currently supplies a Multi-standard High-Definition Video Decoder (MSVD-HD) core that supports H.264, VC-1, and MPEG-1/2 codecs [15].…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Division-Free Multiquantization Scheme for Modern Video Codecs

Das

Mostafa

Wahid

2012

Advances in Multimedia

View full text Add to dashboard Cite

The current trend of digital convergence leads to the need of the video encoder/decoder (codec) that should support multiple video standards on a single platform as it is expensive to use dedicated video codec chip for each standard. The paper presents a high performance circuit shared architecture that can perform the quantization of five popular video codecs such as H.264/AVC, AVS, VC-1, MPEG-2/4, and JPEG. The proposed quantizer architecture is completely division-free as the division operation is replaced by shift and addition operations for all the standards. The design is implemented on FPGA and later synthesized in CMOS 0.18 µm technology. The results show that the proposed design satisfies the requirement of all five codecs with a maximum decoding capability of 60 fps at 187 MHz on Xilinx FPGA platform for 1080 p HD video.

show abstract

Implementation of AVS Jizhun decoder with HW/SW partitioning on a coarse-grained reconfigurable multimedia system

Liu

Chen

Yin

et al. 2014

Sci. China Inf. Sci.

View full text Add to dashboard Cite

In this paper, a TPP (Task-based Parallelization and Pipelining) scheme is proposed to implement AVS (Audio Video coding Standard) video decoding algorithm on REMUS (REconfigurable MUltimedia System), which is a coarse-grained reconfigurable multimedia system. An AVS decoder has been implemented with the consideration of HW/SW optimized partitioning. Several parallel techniques, such as MB (Macro-Block)based parallel and block-based parallel techniques, and several pipeline techniques, such as MB level pipeline and block level pipeline techniques are adopted by hardware implementation, for performance improvement of the AVS decoder. Also, most computation-intensive tasks in AVS video standards, such as MC (Motion Compensation), IP (Intra Prediction), IDCT (Inverse Discrete Cosine Transform), REC (REConstruct) and DF (Deblocking Filter), are performed in the two RPUs (Reconfigurable Processing Units), which are the major computing engines of REMUS. Owing to the proposed scheme, the decoder introduced here can support AVS JP (Jizhun Profile) 1920×1088@39fps streams when exploiting a 200 MHz working frequency.

show abstract

A full-HD 60fps AVS/H.264/VC-1/MPEG-2 video decoder for digital home applications

Cited by 8 publications

References 5 publications

A Cost-Shared Quantization Algorithm and Its Implementation for Multi-Standard Video Codecs

A Cost-Shared Quantization Algorithm and Its Implementation for Multi-Standard Video Codecs

Division-Free Multiquantization Scheme for Modern Video Codecs

Implementation of AVS Jizhun decoder with HW/SW partitioning on a coarse-grained reconfigurable multimedia system

Contact Info

Product

Resources

About