2017
DOI: 10.1109/tcsi.2016.2616905
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A Ferroelectric Nonvolatile Processor with 46 $\mu $ s System-Level Wake-up Time and 14 $\mu $ s Sleep Time for Energy Harvesting Applications

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Cited by 39 publications
(26 citation statements)
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“…The CMOS/FeRAM nonvolatile system could achieve 46 μs wake-up time and 14 μs sleep time, with robust nonvolatile operation in the face of power fluctuations. [220] These results show that integration of CMOS circuit and FeRAM, including hybrid FE-SRAM could provide a competitive technical solution for realizing low power distributed sensors, even when they are operated with the intermittent power supply harvested from the uncertain ambient conditions.…”
Section: Ferroelectrics For Low Power Electronics and Edge Computingmentioning
confidence: 87%
See 1 more Smart Citation
“…The CMOS/FeRAM nonvolatile system could achieve 46 μs wake-up time and 14 μs sleep time, with robust nonvolatile operation in the face of power fluctuations. [220] These results show that integration of CMOS circuit and FeRAM, including hybrid FE-SRAM could provide a competitive technical solution for realizing low power distributed sensors, even when they are operated with the intermittent power supply harvested from the uncertain ambient conditions.…”
Section: Ferroelectrics For Low Power Electronics and Edge Computingmentioning
confidence: 87%
“…The CMOS/FeRAM nonvolatile system could achieve 46 µs wake‐up time and 14 µs sleep time, with robust nonvolatile operation in the face of power fluctuations. [ 220 ]…”
Section: Synergized Multiple Ferroelectric Functions For Distributed Intelligencementioning
confidence: 99%
“…The nonvolatile flip-flop (NV-FF) is regarded as a potential substitute for the conventional volatile FF [1][2][3][4] because of advantages such as zero standby power consumption in the standby mode (power saving), instant-ON from power-down conditions (userexperience improvement and power saving), instant-OFF to the standby mode (powersaving and nonrequirement of external NV memory), and prevention of sudden power failure (reliability improvement). Among the various NV-FF implementations, spin-transfertorque magnetic tunnel junction (STT-MTJ)-based NV-FFs are considered promising due to their characteristics, including nonvolatility, high endurance, long retention time, CMOS compatibility, scalability, and nil area overhead because of stacking above a MOS transistor [5][6][7][8].…”
Section: Introductionmentioning
confidence: 99%
“…This problem is avoided in IoT devices by employing a nonvolatile flip-flop (NVFF) to store the computing data. For this reason, NVFFs have been widely researched by employing various emerging nonvolatile elements, such as field-induced magnetization reversal magnetic tunnel junction (MTJ) [3]- [4], spin-transfer-torque MTJ (STT-MTJ) [5]- [15], complementary polarizer MTJ [16], spin-orbital-torque MTJ [17]- [18], memristor [19]- [22], ferroelectric capacitor (FeCAP) [23]- [26], and ferroelectric field-effect transistor (FeFET) [27]- [28]. Among them, STT-MTJ is suggested to store the computing data as a resistance value (i.e., low and high resistances) before the zero VDD scheme is applied due to its various advantages, such as nonvolatility, high endurance, scalability, and easy integration with CMOS technology [29]- [31].…”
Section: Introductionmentioning
confidence: 99%