In recent years, the low power design of Internet of Things devices has become increasingly important. The most basic method to implement a low power design is to reduce static power consumption. In this regard, a spin-transfer-torque magnetic-tunnel-junction-based nonvolatile flip-flop (NVFF) is a promising candidate for storing the computing data while the power is off. However, as the technology node scales down, the process variation increases, leading to a restoration failure in previous NVFFs, especially in the near-threshold voltage (NTV) region. For better energy efficiency when operating the NVFF in the NTV region, this paper presents a novel NVFF that guarantees a target restore yield of 4σ and a target read disturbance margin of 6σ in the NTV region (0.6 V supply voltage), along with auto-zeroing and dynamic reference voltage (DRV) techniques, using only a single capacitor to improve the NVFF's restore yield. The Monte Carlo HSPICE simulation results using industry-compatible 28-nm model parameters show that the proposed NVFF satisfies both the target restore yield and the read disturbance margin, saving 44% restoration time compared with the current state-of-the-art NVFF, which does not satisfy the target restore yield despite having offset cancellation characteristic. INDEX TERMS Auto-zeroing, double sensing margin, dynamic reference voltage (DRV), magnetic tunnel junction (MTJ), near-threshold voltage (NTV), nonvolatile flip-flop (NVFF), sensing inverter variation tolerant (SIVT), sensing margin (SM).

Recently, the leakage power consumption of Internet of Things (IoT) devices has become a main issue to be tackled, due to the fact that the scaling of process technology increases the leakage current in the IoT devices having limited battery capacity, resulting in the reduction of battery lifetime. The most effective method to extend the battery lifetime is to shut-off the device during standby mode. For this reason, spin-transfer-torque magnetic-tunnel-junction (STT-MTJ) based nonvolatile flip-flop (NVFF) is being considered as a strong candidate to store the computing data. Since there is a risk that the MTJ resistance may change during the read operation (i.e., the read disturbance problem), NVFF should consider the read disturbance problem to satisfy reliable data restoration. To date, several NVFFs have been proposed. Even though they satisfy the target restore yield of 4σ, most of them do not take the read disturbance into account. Furthermore, several recently proposed NVFFs which focus on the offset-cancellation technique to improve the restore yield have obvious limitation with decreasing the supply voltage (VDD), because the offset-cancellation technique uses switch operation in the critical path that can exacerbate the restore yield in the near/sub-threshold region. In this regard, this paper analyzes state-of-the-art STT-MTJ based NVFFs with respect to the voltage region and provides insight that a simple circuit having no offset-cancellation technique could achieve a better restore yield in the near/sub-threshold voltage region. Monte–Carlo HSPICE simulation results, using industry-compatible 28 nm model parameters, show that in case of VDD of 0.6 V, complex NVFF circuits having offset tolerance characteristic have a better restore yield, whereas in case of VDD of 0.4 V with sizing up strategy, a simple NVFF circuit having no offset tolerance characteristic has a better restore yield.