A Dynamically Reconfigurable RF NoC for Many-Core

Abstract

International audienceWith the growing number of cores on chips, conventional electrical interconnects reach scalability limits, leading the way for alternatives like Radio Frequency (RF), optical and 3D. Due to the variability of applications, communication needs change over time and across regions of the chip. To address these issues, a dynamically reconfigurable Network on Chip (NoC) is proposed. It uses RF and Orthogonal Frequency Division Multiple Access (OFDMA) to create communication channels whose allocation allows dynamic recon-figuration. We describe the NoC architecture and the distributed mechanism of dynamic allocation. We study the feasibility of the NoC based on state of the art components and analyze its performances. Static analysis shows that, for point to point communications, its latency is comparable with a 256-node electrical mesh and becomes lower for wider networks. A major feature of this architecture is its broadcast capacity. The RF NoC becomes faster with 32 nodes, achieving a ×3 speedup with 1024. Under realistic traffic models, its dynamic reconfigurability provides up to ×6 lower latency while ensuring fairness

Adaptive Transceiver for Wireless NoC to Enhance Multicast/Unicast Communication Scenarios

“…Additionally, there is a substantial body of work analyzing the impact of allowing multiple parallel channel accesses to improve bandwidth, average packet energy and communication latency. These approaches mainly divide the channel by creating multiple isolated spaces (SDM) [9], by frequency (FDM) [10], using orthogonal frequencies (OFDM) [2], [11], and adopting channelization codes (CDM) [12]. However, each parallel channel access method comes with some challenges to be implemented in WiNoC, such as early network saturation, several band-pass filters, frequency synthesizers, (inverse) fast Fourier transform blocks and ADCs.…”

“…Furthermore, critical bottlenecks are created due to multiple unicast and multicast/broadcast network traffic schemes, thus highly increasing latency and power consumption. To deal with these issues, new interconnect technologies have emerged, e.g., 3D-NoC [1], RF Interconnects (RF-I) based on waveguides [2], Optical NoC [3] and Wireless NoC [4].…”

Dynamically Reconfigurable RF-NoC with Distance-Aware Routing Algorithm

“…The WiNoCoD hierarchical architecture has therefore been set up, with the RF NoC as the highest communication level. In [15], we evaluated the physical characteristics of WiNoCoD for a CMP with 4 096 cores assuming a 22 nm target technology. The complete RF NoC contributes to 5.5% of the overall power consumption which is 180 W, and 4.5% of the overall area which is 920 mm 2 .…”

Scalable THz Network-On-Chip Architecture for Multichip Systems

“…e interference of different wireless links using a shared medium is another aspect that must be addressed. Different types of multiple access technique such as frequency division multiple access (FDMA), code division multiple access (CDMA), wavelength division multiple access (WDMA), and orthogonal frequency division multiple access (OFDMA) have been reported for a different kind of NoCs in the previous literature [7,[12][13][14][15][16][17][18]. FDMA and WDMA techniques have some drawbacks such as increasing the bandwidth demand in parallel with increasing core count and requiring many oscillators operating at different frequencies [15].…”

“…e major drawback of this technique is the synchronization problem between multiple transmitters that may result in low-reliability [19]. Among the aforementioned schemes, OFDMA promises some advantages that the researchers have encouraged to use this modulation as the multiple access technique for NoCs [15][16][17][18][19][20][21][22]. So, we use an OFDMA-based wireless communication for intrachip wireless links as well as interchip ones.…”