This paper discusses the implementation of modulation chains for multi-standard communications on a dynamically and partially reconfigurable heterogeneous platform. Implementation results highlight the benefit of considering a DSP/FPGA platform instead of a multi-DSP platform since the FPGA supports efficiently intensive computation components, which reduces the DSP load. Furthermore, partial dynamic reconfiguration increases the overall performance as compared to total dynamic reconfiguration since there is 45% of bitstream size reduction, which leads to a 45% decrease of the whole reconfiguration time. The implementation of modulation chains for multi-standard communications proves the availability of new technology to support efficiently Software Defined Radio.
ISSN : 1939-8018 (Print) 1939-8115 (Online)In the field of Software Radio (SWR), parameterization studies have become a very important topic. This is mainly because parameterization will probably decrease the size of the software to be downloaded, and also because it will limit the reconfiguration time. In this paper, parameterization is considered as a digital radio design methodology. Two different techniques, namely common functions and common operators are considered. In this paper, the second view is developed and illustrated by two examples: the well known Fast Fourier Transform (FFT) and the proposed Reconfigurable Linear Feedback Shift Register (R-LFSR), derived from the classical Linear Feedback Shift Register (LFSR) structure
Wireless Network-on-Chip (WiNoC) is one of the most promising solutions to overcome multi-hop latency and high power consumption of modern many/multi core System-on-Chip (SoC). However, the design of efficient wireless links faces challenges to overcome multi-path propagation present in realistic WiNoC channels. In order to alleviate such channel effect, this paper presents a Time-Diversity Scheme (TDS) to enhance the reliability of on-chip wireless links using a semi-realistic channel model. First, we study the significant performance degradation of state-of-the-art wireless transceivers subject to different levels of multi-path propagation. Then we investigate the impact of using some channel correction techniques adopting standard performance metrics. Experimental results show that the proposed Time-Diversity Scheme significantly improves Bit Error Rate (BER) compared to other techniques. Moreover, our TDS allows for wireless communication links to be established in conditions where this would be impossible for standard transceiver architectures. Results on the proposed complete transceiver, designed using a 28-nm FDSOI technology, show a power consumption of 0.63mW at 1.0V and an area of 317 µm 2. Full channel correction is performed in one single clock cycle.
The first challenging step of the demodulation of the DVB-S2 signal with function of VCM (Variable Coding and Modulation)/ACM (Adaptive Coding and Modulation) is the detection of the Physical Layer (PL) header. PL header is transmitted using π/2-BPSK modulation and is composed of a fixed part (26 bits of Start Of Frame (SOF)) and a variable part (64 bits codeword of PL Signaling (PLS) code that defines the structure of the PL frame). Since the 90 bits corresponding to the PL header are affected by noise, the carrier frequency offset and the phase noise, the synchronization task in a DVB-S2 receiver is thus a critical task. In this paper, we present a properties of the Hadamard code used to encode the information of the PLS code to reinforce frame detection before knowing the actual value of the PL code. Moreover, we propose to perform the computation in the polar domain in order to avoid the need of multiplier and thus, to obtain a very low cost implementation. The associated decoder architecture is presented together with the measured performance at several SNRs.
The use of Unmanned Aerial Vehicles (UAVs) is rising constantly whether for leisure or professional purposes in civilian or Defense domains. We consider in this study small civilian aerial drones of different types, which are low cost, available off the shelf and so affordable for individuals. Simultaneously, they have also raised security concerns for critical sites such as nuclear stations, strategic locations like official buildings, crowded places as stadiums, etc. The aim of this paper is to provide a survey of the risks assessment with and for UAVs in general. Regarding the security concern we pay a specific attention to attacks that are facilitated and can benefit from an easy access to Software Defined Radio (SDR) boards that can be embedded in the UAV or in the ground segment.
Wireless Networks-on-Chip (WiNoC) are being explored for parallel applications to improve the performances by reducing the long distance/critical path communications. However, WiNoC still require precise propagation models to go beyond proof of concept and to demonstrate it can be considered as a realistic efficient alternative to wired NoC. In this paper, we present accurate 3D models based on measurements in Ka band and Electromagnetic (EM) simulations of transmission on silicon substrate in the V band and the Sub-THz band. Using these EM results, a time-domain simulation is performed using an On-Off Keying (OOK) modulation based transmission with different PA/LNA configurations. Our results highlight the type of performances and tradeoffs to be considered according to different parameters such as power output and amplifier's gain. By improving the knowledge about the signal propagation, one can conduct precise design space exploration for parallel applications. We discuss the realistic channel modeling and we present also hybrid solutions and associated limitations of WiNoC architectures. We conclude the paper with research directions to be explored to make WiNoC a reality.
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