A Device-Level Characterization Approach to Quantify the Impacts of Different Random Variation Sources in FinFET Technology

Jiang, Xiaobo; Guo, Shaofeng; Wang, Runsheng; Wang, Xinsheng; Cheng, Binjie; Asenov, A.; Huang, Ru

doi:10.1109/led.2016.2581878

Cited by 20 publications

(5 citation statements)

References 14 publications

(11 reference statements)

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“…The mean and median 𝐼 ds − 𝑉 gs characteristics are also shown. It can be seen that the WFV induces strong variations of the SS in case of TFETs, whereas in MOSFETs, the SS has a negligible dependence on the WFV [32]. In contrast to the constant SS in conventional MOSFETs, the SS in TFETs has a dependence on Vgs in the subthreshold region due to the complex dependency of the tunnel current on the transmission probability as well as the number of available states [1].…”

Section: The Influences Of Wfv On Nanowire Tfetsmentioning

confidence: 95%

“…In addition to the current booster such as heterostructures, the use of the high-k/metal-gate and the scaled nanowire with 20 nm diameter in [4] also attribute to the high current since they together provide the excellent electrostatic control over the channel [7]. It is, therefore, important to understand how the metal gate work-function variations (WFV) affects the scaled nanowire TFET performance and its performanceinduced variability [8].…”

Section: Introductionmentioning

confidence: 99%

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Quantum simulation investigation of work-function variation in nanowire tunnel FETs

Guan¹,

Carrillo-Nuñez²,

Georgiev³

et al. 2021

Nanotechnology

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The variability induced by the work-function variation (WFV) in p-type ultra-scaled nanowire tunnel FET (TFET) has been studied by using the Non-Equilibrium Green’s Function module implemented in University of Glasgow quantum transport simulator called NESS. To provide a thorough insight into the influence of WFV, we have simulated 250 atomistically different nanowire TFETs and the obtained results are compared to nanowire MOSFETs first. Our statistical simulations reveal that the threshold voltage (V th) variations of MOSFETs and TFETs are comparable, whereas the on-current (I on) and off-current (I off) variations of TFETs are smaller and higher, respectively in comparison to the MOSFET. Based on the results of the simulations, we have provided a physical insight into the variations of the I on and I off currents. Then, we compared the nanowire and Fin TFETs structures with different oxide thickness in terms of the WFV-induced variability. The results show that WFV has a strongest impact on the I off, and moderate effect on the I on and V th in nanowire TFET with smaller oxide thickness. Lastly, it is found that compared with the random discrete dopants, WFV is a relatively weaker variability source in ultra-scaled nanowire TFETs, especially from the point of view of I on variation.

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Section: The Influences Of Wfv On Nanowire Tfetsmentioning

confidence: 95%

Section: Introductionmentioning

confidence: 99%

Quantum simulation investigation of work-function variation in nanowire tunnel FETs

Guan¹,

Carrillo-Nuñez²,

Georgiev³

et al. 2021

Nanotechnology

Self Cite

View full text Add to dashboard Cite

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“…For these reasons, FinFET technologies are more prone to suffer from process variations such as the line edge roughness (LER) and metal gate granularity (MGG) [4]. These sources of variation generally maintain the chip functioning correctly, but it fails to meet some performance or power criteria increasing the parametric yield loss.…”

Section: Circuit Design For Improve the Reliabilitymentioning

confidence: 99%

Sleep Transistors to Improve the Process Variability and Soft Error Susceptibility

Zimpeck

Meinhardt

Artola

et al. 2019

2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)

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This paper evaluates the potential of using the sleep transistor in FinFET logic cells to mitigate the process variability effects and the soft error susceptibility. The insertion of a sleep transistor improves up to 40.6% the delay variability and up to 12.4% the power variability. Moreover, the design with a sleep transistor became all logic cells investigated free of faults, independently of the supply voltage applied in the design.

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“…Moreover, it further has exacerbated the challenge faced by the IC industry as the MOSFETs continuously shrink into the nanometer regime. To overcome these barriers, much effort has been devoted to investigating the impact of various PVs on V T and/or DIBL [5][6][7]. Both experimental and theoretical studies have confirmed that V T and DIBL are very prone to random dopant fluctuation (RDF) effect in nanometer MOSFET channels.…”

Section: Introductionmentioning

confidence: 99%

Estimation of Drain-Induced Barrier Lowering Variation Due to Random Dopant Fluctuation Effect in Nanometer MOSFETs by Gamma Distribution

Lyu,

Han,

Zhang

et al. 2024

Frontiers in Artificial Intelligence and Applications

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Drain-induced barrier lowering (DIBL) and its variations are regarded as significant challenges in nanometer semiconductor device and circuit analysis, design as well as fabrication. This paper investigates the statistical characteristic of DIBL due to random dopant fluctuation (RDF) effect in MOSFETs. The results exhibit that the DIBL variation is more suitably described by a gamma distribution than a Gaussian distribution, based on validation by Monte Carlo simulations. The average error and mean square error of a gamma approximation are –0.14987 and 0.42591, respectively, for the probability density function, and 0.13523 and 0.50584, respectively, for the cumulative density function, which are much smaller than the equivalent measures of a Gaussian approximation. Our study also reveals that DIBL dispersion due to RDF effect in nanometer MOSFET channels is asymmetric with a long tail, which should be described with higher moments such as skewness and kurtosis.

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A Device-Level Characterization Approach to Quantify the Impacts of Different Random Variation Sources in FinFET Technology

Cited by 20 publications

References 14 publications

Quantum simulation investigation of work-function variation in nanowire tunnel FETs

Quantum simulation investigation of work-function variation in nanowire tunnel FETs

Sleep Transistors to Improve the Process Variability and Soft Error Susceptibility

Estimation of Drain-Induced Barrier Lowering Variation Due to Random Dopant Fluctuation Effect in Nanometer MOSFETs by Gamma Distribution

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