A Dedicated Monitoring Infrastructure for Multicore Processors

Abstract

Abstract-On-chip monitoring of environmental information, such as temperature, voltage, and error data, is becoming increasingly important. To address this need, a low-overhead architectural approach to monitor data collection and use in multicore systems is described. A key aspect of our stand-alone monitoring subsystem is a low-complexity, on-chip network designed to transport monitor data with multiple priority levels. Collected monitor information is evaluated by a dedicated processor. Experimental results using architectural and interconnect simulators show that the new low-overhead subsystem facilitates employment of thermal and delay-aware dynamic voltage and frequency scaling. In contrast to using existing on-chip interconnect resources to communicate monitor data, the new subsystem provides necessary bandwidth for monitor data traffic without impacting application data traffic. Synthesis results show that our dedicated monitoring approach consumes about 0.2% of multicore area and power resources for an 8-core system based on AMD Athlon 64 processor cores.Index Terms-Network on chip, on-chip monitoring, multicore.

MoNoC: A monitored network on chip with path adaptation mechanism

“…DMesh [3], 3D Mesh-Bus Hybrid [4] and 2D Torus [5]) while other works claim that their monitoring method is generic enough to be employed in other tile-based topologies (e.g. [6,7]). Although the experiments presented in this paper are based on mesh topology, MoNoC's monitoring mechanism is independent of the NoC topology.…”

“…Usually, the global view provided by centralized monitoring (e.g. [7][8][9][10]) allows better results for small NoCs. Nevertheless, as the NoC/system size increases, traffic load and monitoring packets latency penalize the centralized approach.…”

RELEASE: A High-Level Paradigm for Reliable Large-Scale Server Software

“…As the name suggests, the tool is designed to be extensible to provide different types of tracing tuned to different applications and environments. While these tools support monitoring Erlang programs across distributed nodes, there is a problem in dealing with the volume of data generated; on a multicore chip, or highly parallel system, it will be impossible to ship all the data off the chip without swamping communication entirely [31]. So, we will ensure that local monitoring and analysis can be performed within the system, leveraging the locality supported by SD Erlang to support a hierarchical 'tracing architecture'.…”

Light-Weight On-Chip Monitoring Network for Dynamic Adaptation and Calibration

“…The first work completely dedicated to the topic is [9], expanded afterwards by [10]. These works exposed the problem and proposed a network architecture that targets multicore processors and supports priority-based data transfer and customized interfacing.…”