A CMOS power amplifier using a split cascode structure to enhance its efficiency

Abstract

In this study, we propose a simple technique to enhance the efficiency of RF CMOS power amplifiers in which a cascode structure is utilized. To increase the efficiency in the low‐output‐power region, we split a common gate transistor into two parts. For the low‐output‐power mode, one of the common gate transistors is turned off to reduce the amount of DC power consumed. To verify the feasibility of the proposed split cascode structure, we designed a 2.2‐GHz CMOS power amplifier using the 180‐nm RF CMOS process. With a WCDMA modulated signal, we obtain a maximum‐output power of 23.4 dBm with 20.8% power‐added efficiency (PAE). At an output power of 16 dBm, the PAE is enhanced by the mode change of the designed power amplifier. From the measured results, we successfully verify the feasibility of the proposed split cascode structure for RF CMOS power amplifier applications. © 2016 Wiley Periodicals, Inc. Microwave Opt Technol Lett 58:309–312, 2016

Differential 2.4‐GHz CMOS power amplifier using stacked NMOS, transformer, and PMOS structures to enhance reliability

“…To overcome the breakdown problems, various circuit design techniques were introduced as shown in Figure . One of the popular structures is the cascode structure illustrated in Figure A . However, although the breakdown issues could be moderated using the cascode structure, an additional control method is required to obtain acceptable reliability.…”

“…One of the popular structures is the cascode structure illustrated in Figure 1A. [7][8][9][10] However, although the breakdown issues could be moderated using the cascode structure, an additional control method is required to obtain acceptable reliability. More recently, the stacked structure shown in Figure 1B was introduced to obtain reliability using a submicron RFCMOS process.…”