A chipset for scalable QoS-preserving protocol-independent packet switch fabrics

Chiussi, F.M.; Bakhru, U.; Brizio, A.; Gu, Gao; Idirene, Nasser E.; Kazi, Khurram; Li, Tao; Leshchuk, J.; Moran, Patrick B.; Quinn, Dusty; Reynolds, Alfred; Shen, Sheng; Staunton, D.; Syed, M.; Wasilewski, T.

doi:10.1109/isscc.2001.912613

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A family of ASIC devices for next generation distributed packet switches with QoS support for IP and ATM

Chiussi¹,

Brizio²,

Francini³

et al.

HOT 9 Interconnects. Symposium on High Performance Interconnects

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The Protocol-Independent ( T ) family of ASIC devices, which we present in this paper; allows to build cost-effective IP routers and ATM switches capable of providing sophisticated Quality-of Service (QoS) guarantees in the form of throughput, delay, and jitter to individual flows or to aggregation ofjows. The new chipset, which represents the evolution of the widely used ATLANTA chipset [I], comprises jive devices. The devices presented considerable design and verijication challenges, due to the complexity and required speed of the desired QoS functionality. To solve these challenges, we devised a number of design techniques, as well as a novel ad-hoc verifkation approach.

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