2014
DOI: 10.1109/tcsii.2013.2296196
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A Broadband Low-Power Millimeter-Wave CMOS Downconversion Mixer With Improved Linearity

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Cited by 31 publications
(15 citation statements)
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“…1(a) shows the schematic of the proposed CMOS mixer based on a modified Gilbert mixer topology, where the tail current source and the RF transconductance stage in a conversional Gilbert mixer are replaced by a Marchandbalun-based RF stage to reduce the supply voltage [10]. In addition, an active load that is composed of two PMOS transistors (M 9 and M 10 ) and two common-mode feedback resistors (R 1 and R 2 ) is employed to provide a high load impedance [11].…”
Section: Analysis and Design Of The Proposed Reconfigurable Dual-mentioning
confidence: 99%
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“…1(a) shows the schematic of the proposed CMOS mixer based on a modified Gilbert mixer topology, where the tail current source and the RF transconductance stage in a conversional Gilbert mixer are replaced by a Marchandbalun-based RF stage to reduce the supply voltage [10]. In addition, an active load that is composed of two PMOS transistors (M 9 and M 10 ) and two common-mode feedback resistors (R 1 and R 2 ) is employed to provide a high load impedance [11].…”
Section: Analysis and Design Of The Proposed Reconfigurable Dual-mentioning
confidence: 99%
“…Compared with a commonly used lumped poly-phase filter [12], [13], the passive four-way quadrature divider has a much lower insertion loss in the mmW range at the cost of a larger chip size. In addition, the transimpedance amplifier (TIA), which is composed of an NMOS transistor M bn , a PMOS transistor M bp and a feedback resistor R F (500 ), is utilized as an intermediate-frequency (IF) output buffer [11].…”
Section: Analysis and Design Of The Proposed Reconfigurable Dual-mentioning
confidence: 99%
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“…Introduction: A down-conversion mixer which converts the RF signals to the IF signals is an essential component of the wireless communication systems [1][2][3][4][5][6][7][8][9]. The Gilbert-cell mixer with the advantages of good conversion gain (CG) and superior spur rejection in a compact size is widely used in modern CMOS transceiver integration circuits [1][2][3][4].…”
mentioning
confidence: 99%
“…Nevertheless, the large LO power requirement increases the dc power burden of the LO part, especially at high frequencies. To solve this problem, the weak-inversion technique is adopted in this work [8,9]. The weak-inversion biasing technique which gate-source voltage (V GS ) is lower than the threshold voltage provides a superior performance on the ratio of transconductance (g m ) to dc current than the strong inversion bias.…”
mentioning
confidence: 99%