A mixer is an indispensable device in the RF transceiver system. Along with the rapid development of mobile communication technology, the demand on the RF mixer for compatibility with multiple communication standards and functional diversity is increasing. As a result, the mixer with wider bandwidth, lower noise, higher linearity, and less power consumption is urgently needed.In the article, the basic principle and the circuit architectures of the mixer are reviewed, including the essential performances such as linearity, noise, gain, bandwidth, and so forth. In addition, several aspects are presented, compared, and discussed with particular emphasis on optimization design approach and performance. Current design and fabrication challenges, future development, application areas of the mixer and visions for the mixer are also discussed in this review.
In radio-frequency (RF) transceiver system, the receiver is used to convert RF signal to low/medium frequency for signal processing and information gathering. In the paper, a novel high-gain, low-noise CMOS mixer is designed and analyzed. In the design, gain-boosting and PMOS dynamic switching current are employed to achieve better effects of noise cancellation and trans-conductance enhancement. In order to improve the mixer's performance, the designed structure is mainly based on the double-balanced Gilbert lattice mixer combined with the parallel LC resonant and optimum biasing networks. The mixer shows high conversion gain (CG), low noise figure (NF), and low power consumption performances based on made possible by 90-nm CMOS technology. Operated at 77 GHz, the input third-order intercept point (IIP3) is -6.14 dBm, and the maximum conversion gain is 18.4 dB. At an IF frequency of 200 MHz, a bilateral band noise figure of 9.2 dB is recorded, while 6.96 mW is consumed with 1.2 V and 2 dBm LO power.
In radio-frequency (RF) transceiver system, the receiver is used to convert RF signal to low/medium frequency for signal processing and information gathering. In the paper, a novel high-gain, low-noise CMOS mixer is designed and analyzed. In the design, gain-boosting and PMOS dynamic switching current are employed to achieve better effects of noise cancellation and trans-conductance enhancement.In order to improve the mixer's performance, the designed structure is mainly based on the doublebalanced Gilbert lattice mixer combined with the parallel LC resonant and optimum biasing networks. The mixer shows high conversion gain (CG), low noise gure (NF), and low power consumption performances based on made possible by 90-nm CMOS technology. Operated at 77 GHz, the input third-order intercept point (IIP3) is -6.14 dBm, and the maximum conversion gain is 18.4 dB. At an IF frequency of 200 MHz, a bilateral band noise gure of 9.2 dB is recorded, while 6.96 mW is consumed with 1.2 V and 2 dBm LO power.
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