A basic architecture supporting LGDG computation

Abstract

In order to combine the benefits of dataflow and control-flow computation while avoiding the pitfalls of both, the authors propose a twolevel model of large-grain dataflow computation, called LGDG computation. A formalism has been provided in a previous paper to prove the determinism of parallel program execution under this model. The current paper presents the basic LGDG computer architecture which is organized at two levels, called the graph level and the node level. The kernel of the node-level architecture is characterized by its non-branch RISC (N-RISC) feature, which ensures an optimal utilization of pipeline processing. This kernel is supported by various co-processors based on the principle of function migration. We will show in this paper how the graph-level architecture can be reduced to a matching unit, extended by a writable control store, through node migration and node aggregation. As a result, the matching overhead is drastically reduced, thus eliminating the most severe bottleneck of existing 'fine-grain' dataflow computers.

A multi-level parallelism architecture

“…The ASTOR architecture is based on the data structure architecture STARI.~:r [9] and shares the use of complex machine operations as data flow actors with the large-grain data flow architectures Stollmann Data Flow Machine [10], Decoupled Graph/Computation Architecture [11], and the LGDF Machine [12]. Unlike the usual large-grain data flow technique, sequences of instructions are not supported as data flow actors by the ASTOR architecture.…”