A 79 GHz dynamic frequency divider in SiGe bipolar technology

Abstract

Conventional static frequency dividers use master-slave flipflops to achieve frequency division. They allow broadband operation down to DC as long as the slew rate of the input signal is high enough. Their upper frequency, however, is limited by the gate delay τ D to a value of approximately 1/(2 τ D ). Significantly higher operating frequencies can be achieved by dynamic frequency dividers. The limited bandwidth of dynamic dividers is a drawback but poses no problem in many applications which require divider operation only in a specific frequency range. Dynamic dividers manufactured in III-V-technologies and, recently, in SiGe technology achieve maximum operating frequencies of 60GHz to 75GHz [1,2,3]. However, most of these circuits operate over relatively narrow bandwidths of less than one octave. This regenerative frequency divider exploits the high-speed potential of SiGe technologies to combine high maximum frequency with operation over wide frequency range. Figure 12.7.1 shows the basic block diagram for regenerative frequency division [4]. The circuit consists of a mixer, a low-pass filter, and an amplifier. The output signal of the amplifier serves as local oscillator (LO) signal for the mixer. Assuming an input frequency f IN and an LO frequency f OUT , the mixer output signal will contain the frequencies f IN ± f OUT . Only the component f IN -f OUT can pass the low-pass filter and stable operation is possible under the condition f IN -f OUT = f OUT . This leads to the desired divide-by-two function with f OUT = f IN / 2. The maximum operating frequency of this divider type is limited by the frequency response of the feedback loop. At high frequencies the loop gain becomes insufficient for divider operation. The lower limit for the input frequency is reached if the low-pass filter no longer suppresses the frequency component of 3f IN / 2 occurring at the mixer output. The obtainable ratio of f IN,max /f IN,min is approximately three. By using an active mixer the basic circuit shown in Figure 12.7.1 can be further simplified. Since the required gain is provided by the mixer, no additional amplifier is necessary. Moreover, the low-pass filter can also be omitted because of the inherent low-pass characteristics of the mixer frequency response. Figure 12.7.2 shows the block diagram of the dynamic frequency divider circuit. It contains an active double-balanced mixer performing the regenerative frequency division and an output buffer/ limiter. This limiter stage is necessary to keep the output amplitude of the divider independent of the applied input signal level. Figure 12.7.3 shows the circuit diagram of the regenerative divider containing the balanced mixer. The input signal is applied to one of the mixer ports, whereas the mixer output is connected to the second mixer input via three cascaded emitter followers. These emitter followers provide the necessary level shifting and help to optimize the frequency response of the feedback loop. The output buffer is connected to the second emitter follower stage....

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“…These circuits were simple E2CL elements driven by external clocking. Dynamic frequency dividers with rates as high as 79GHz in an 80GHz fT technology have been reported [7]. The authors report 53GHz static frequency dividers in the same technology.…”

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“…Two commonly used prototypes of dividers are static-and dynamic-structure based. The dynamic divider offers very high speed [1]. However, the limitation regarding the possible bandwidth restricts the use for many applications.…”

A 23-24 GHz low power frequency synthesizer in 0.25/spl mu/m SiGe

“…Furthermore they are often either narrow-band or power hungry. For instance the regenerative divider in [2] achieves 0.07 GHz/mW at 79 GHz with a FT of 80 GHz.…”