A 1.9V 25GHz SiGe static frequency dividers with clock-sharing topology

Abstract

A novel low-voltage, high-speed static divider topology using shared clock-transistors is proposed. The divideby-2 is implemented in 0.18µm 60GHz-f T SiGe BiCMOS technology. At 1.9V u 9mA supply power of the divider core, an operation frequency of up to 25GHz was measured. Compared to the conventional D flip-flop architecture, at similar speed, a reduction of 34% in supply power is enabled.