A 65nm flip-flop array to measure soft error resiliency against high-energy neutron and alpha particles

Abstract

We fabricated a 65nm LSI including flip-flop array to measure soft error resiliency against high-energy neutron and alpha particles. It consists of two FF arrays as follows. One is an array composed of redundant FFs to confirm radiation hardness of the proposed and conventional redundant FFs. The other is an array composed of conventional D-FFs to measure SEU (Single Event Upset) and MCU(Multiple Cell Upset) by the distance from tap cells.

Radiation hardness evaluations of 65 nm fully depleted silicon on insulator and bulk processes by measuring single event transient pulse widths and single event upset rates

“…To measure SEU rates on FFs, we prepare an FF array on the basis of a shift register, which is constructed using FFs and a clock buffer chain. 23,24) Figure 6 shows the schematic of the FF array and Fig. 7 shows that of the implemented FF.…”