A 60-GHz down-converting CMOS single-gate mixer

Emami, S.; Doan, C.H.; Niknejad, Ali M.; Brodersen, R.W.

doi:10.1109/rfic.2005.1489619

Cited by 65 publications

(20 citation statements)

References 5 publications

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confidence: 99%

A mm-Wave CMOS Heterodyne Receiver with On-Chip LO and Divider

Razavi¹

2007

2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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The unlicensed band around 60GHz has motivated work on mmwave CMOS building blocks such as low-noise amplifiers (LNAs) and mixers [1,2] and oscillators [3]. However, the integration of these building blocks to form transceivers poses additional constraints on the design of these circuits. For example, a direct-conversion receiver would require at least two inductors for the LNA, one inductor for each quadrature mixer, at least two inductors for the quadrature oscillator, and at least one inductor for the first divider in the synthesizer loop. (In practice, each side of the quadrature oscillator must be loaded by a divider to retain phase balance, thus requiring one more inductor.) With the large foot print of the inductors, the 60GHz quadrature phases of the LO must travel a long distance before reaching the mixers (or, if the mixer transistors are placed next to the LO transistors, the RF signal must travel a long distance to reach the mixers.) Under these conditions, both the loss and mismatches contributed by the long interconnects degrade the performance of the LO and the receiver considerably. Insertion of buffers between the LO and the mixers does not resolve the mismatch issues as the buffers themselves must incorporate inductors. (The buffers are still necessary to avoid injection pulling of the LO by large in-band interferers received and amplified by the LNA.) This paper describes a heterodyne receiver that avoids quadrature separation at mm-wave frequencies, easing the management of interconnect lengths and allowing the integration of all highfrequency building blocks.Figure 10.1.1 shows the receiver architecture, where the RF mixer is directly driven by the LO and the IF mixers by half of the LO frequency. While designed for operation at 60GHz (with f LO =40GHz), the fabricated prototype yields f LO ≈35GHz and is tested with an input frequency of 53GHz. (A prototype with adjusted inductor values to allow operation at 60GHz is presently in fabrication.) Several aspects of the above architecture merit consideration. First, in contrast to a 60GHz quadrature LO required in direct conversion, the oscillator used here must operate at 40GHz and provide only differential outputs. Therefore, it potentially achieves a lower phase noise especially because the Q of varactors appears to fall below that of inductors at high frequencies. Second, the choice of divide-by-2 [4] over divide-by-4 is governed by the level of image rejection that can be achieved by the selectivity of the front-end. Third, even though directly tied to the RF mixer, the LO is not pulled by in-band interferers because they bear a frequency difference as high as f RF /3 with respect to f LO . Fourth, the divide-by-2 circuit must operate at a nominal frequency of 40GHz, dictating either an injection-locked topology which suffers from a narrow lock range and hence poses risks on the overall design, or a Miller regenerative topology which does not readily produce quadrature phases. In this work, a Miller divider is chosen and the quadrature oper...

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A mm-Wave CMOS Heterodyne Receiver with On-Chip LO and Divider

Razavi¹

2007

2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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“…Table I is the comparison of reported MMW CMOS active mixers. Both measured conversion gains (0 and 1 dB) of our mixers are better than those of the other gate mixers [2], [3], and comparable to those of MMW Gilbert-cell mixers [4]- [6] with higher dc consumption. The LO-to-RF isolations of our mixers are better than 45 dB, which are better than the reported single-end and double-balanced mixers [2]- [6].…”

Section: Simulation and Measurement Resultsmentioning

confidence: 59%

60 GHz Double-Balanced Gate-Pumped Down-Conversion Mixers With a Combined Hybrid on 130 nm CMOS Processes

Lien¹,

Huang²,

Kao³

et al. 2010

IEEE Microw. Wireless Compon. Lett.

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Two 60-GHz compact double-balanced gate-pumped mixers using standard bulk 0.13 m CMOS process are presented. The homodyne and heterodyne mixers utilize small-size combined hybrids and demonstrated a small chip size of 0.8 0.85 and 0 7 0 7 mm 2 , including pads. With 5 dBm LO power, the best measured conversion gains are 1 and 0 dB in the 3 dB bandwidths of 15 GHz from 54 to 69 GHz and 14 GHz from 53 to 67 GHz RF. The LO-to-RF isolations are greater than 45 dB at a low bias of 1.2 V and 12 mA. This is the first demonstration of the double-balanced gate mixer in millimeter wave frequency.

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“…10, a single-gate mixer [44] is to the length of 480 m to become a at 75 GHz. The mixer operates under 1 V power supply, and the transistor is biased at sub-threshold region with of 0.35 V. The circuit analysis of mixer is conducted with Cadence Spectre simulator in two steps for different T-line models.…”

Section: B Single-gate Mixer With T-line Stubmentioning

confidence: 99%

Design and Analysis of CMOS-Based Terahertz Integrated Circuits by Causal Fractional-Order RLGC Transmission Line Model

Shang

Wei

2013

IEEE J. Emerg. Sel. Topics Circuits Syst.

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A causal and compact fractional-order model is developed for complementary metal-oxide-semiconductor (CMOS) on-chip transmission line (T-line) at Terahertz (THz) frequencies. With consideration of the loss from frequency-dependent dispersion and nonquasi-static effects at THz, good agreement of characteristic impedance is observed between the proposed fractionalorder model and the measurement up to 110 GHz, while traditional integer-order model can only match up to 10 GHz. The developed fractional-order model is further deployed in the design and analysis of CMOS-based THz integrated circuits that utilize T-line, such as standing-wave oscillator, which has significantly improved accuracy with causality.

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A 60-GHz down-converting CMOS single-gate mixer

Cited by 65 publications

References 5 publications

A mm-Wave CMOS Heterodyne Receiver with On-Chip LO and Divider

A mm-Wave CMOS Heterodyne Receiver with On-Chip LO and Divider

60 GHz Double-Balanced Gate-Pumped Down-Conversion Mixers With a Combined Hybrid on 130 nm CMOS Processes

Design and Analysis of CMOS-Based Terahertz Integrated Circuits by Causal Fractional-Order RLGC Transmission Line Model

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