A 5mm&lt;sup&gt;2&lt;/sup&gt; 40nm LP CMOS 0.1-to-3GHz multistandard transceiver

Ingels, Mark; Giannini, Vito; Borremans, Jonathan; Mandal, Gautam; Debaillie, Björn; Wesemael, Peter Van; Sano, T.; Yamamoto, Takaya; Hauspie, D.; Driessche, Joris Van; Craninckx, Jan

doi:10.1109/isscc.2010.5433964

Cited by 25 publications

(10 citation statements)

References 8 publications

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“…The proposed RF receiver provides more than 8.3 dB of minimum SNR [14], while receiving the input channel power from 88 to 12 dBm. Table 2 summarizes the measured results and compares them with the state-of-the-art measurements [12,13]. The proposed RF receiver achieves the widest channel bandwidth, the highest gain, and the lowest noise figure.…”

Section: ⅳ Measurement Resultsmentioning

confidence: 99%

A 0.13-㎛ Zero-IF CMOS RF Receiver for LTE-Advanced Systems

Seo¹,

Lai²,

Kim³

2014

Journal of electromagnetic engineering and science

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This paper presents a zero-IF CMOS RF receiver, which supports three channel bandwidths of 5/10/40 MHz for LTE-Advanced systems. The receiver operates at IMT-band of 2,500 to 2,690 MHz. The simulated noise figure of the overall receiver is 1.6 dB at 7 MHz (7.5 dB at 7.5 kHz). The receiver is composed of two parts: an RF front-end and a baseband circuit. In the RF front-end, a RF input signal is amplified by a low noise amplifier and Gm with configurable gain steps (41/35/29/23 dB) with optimized noise and linearity performances for a wide dynamic range. The proposed baseband circuit provides a 1 dB cutoff frequency of up to 40 MHz using a proposed wideband OP-amp, which has a phase margin of 77° and an unit-gain bandwidth of 2.04 GHz. The proposed zero-IF CMOS RF receiver has been implemented in 0.13-μm CMOS technology and consumes 116 (for high gain mode)/106 (for low gain mode) mA from a 1.2 V supply voltage. The measurement of a fabricated chip for a 10-MHz 3G LTE input signal with 16-QAM shows more than 8.3 dB of minimum signal-to-noise ratio, while receiving the input channel power from 88 to 12 dBm.

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Section: ⅳ Measurement Resultsmentioning

confidence: 99%

A 0.13-㎛ Zero-IF CMOS RF Receiver for LTE-Advanced Systems

Seo¹,

Lai²,

Kim³

2014

Journal of electromagnetic engineering and science

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“…Thus, the predistortion method improves the measured ACLR to have at least 12.6 dB of margin to the requirements [51], [52]. The measured ACLR at 5 MHz is comparable to state-of-the-art WCDMA [53], [54] transceivers.…”

Section: B Measured Performance Of Modulated Signalsmentioning

confidence: 94%

Least-Squares Phase Predistortion of a +30 dBm Class-D Outphasing RF PA in 65 nm CMOS

Jung

Fritzin

Enqvist

et al. 2013

IEEE Trans. Circuits Syst. I

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Abstract-This paper presents a model-based phase-only predistortion method suitable for outphasing radio frequency (RF) power amplifiers (PA). The predistortion method is based on a model of the amplifier with a constant gain factor and phase rotation for each outphasing signal, and a predistorter with phase rotation only. Exploring the structure of the outphasing PA, the model estimation problem can be reformulated from a nonconvex problem into a convex least-squares problem, and the predistorter can be calculated analytically. The method has been evaluated for 5 MHz Wideband Code-Division Multiple Access (WCDMA) and Long Term Evolution (LTE) uplink signals with Peak-to-Average Power Ratio (PAPR) of 3.5 dB and 6.2 dB, respectively, applied to one of the first fully integrated +30 dBm Class-D outphasing RF PA in 65nm CMOS. At 1.95 GHz for a 5.5 V (6.0 V) supply voltage, the measured output power of the PA was +29.7 dBm (+30.5 dBm) with a power-added efficiency (PAE) of 27 %. For the WCDMA signal with +26.0 dBm of channel power, the measured Adjacent Channel Leakage Ratio (ACLR) at 5 MHz and 10 MHz offsets were -46.3 dBc and -55.6 dBc with predistortion, compared to -35.5 dBc and -48.1 dBc without predistortion. For the LTE signal with +23.3 dBm of channel power, the measured ACLR at 5 MHz offset was -43.5 dBc with predistortion, compared to -34.1 dBc without predistortion.

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“…The flexible analog frontend is implemented with the Scaldio RF IC, demonstrated at Dyspan 2010 [2]. Scaldio is a fully reconfigurable analog transceiver implemented in 40nm CMOS technology [1]. It covers all functionality from the LNA to the ADC (Fig.…”

Section: A Flexible Analog Front-endmentioning

confidence: 99%

An integrated reconfigurable engine for multi-purpose sensing up to 6 GHz

Pollin

Hollevoet

Wesemael

et al. 2011

2011 IEEE International Symposium on Dynamic Spectrum Access Networks (DySPAN)

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We demonstrate a reconfigurable engine for multipurpose spectrum sensing within the cost and power constraints of mobile devices. The analog part builds up on the Scaldio reconfigurable analog front-end [1]. The digital part is an innovative Digital Front-end for Sensing capable of performing a range of sensing algorithms [3], which has now been fully implemented as a chip. The goal of this demo is the first demonstration of the digital chip, integrated with an analog front-end, enabling real-time validation of the sensing engine. The setup is validated for DVB-T and LTE, two important candidates for future DySPAN networks, as well as for very fast spectrum sweeping. This is the first integrated low power solution that can achieve such a very fast spectrum sweeping, thanks to the integration of two innovative components.

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A 5mm<sup>2</sup> 40nm LP CMOS 0.1-to-3GHz multistandard transceiver

Cited by 25 publications

References 8 publications

A 0.13-㎛ Zero-IF CMOS RF Receiver for LTE-Advanced Systems

A 0.13-㎛ Zero-IF CMOS RF Receiver for LTE-Advanced Systems

Least-Squares Phase Predistortion of a +30 dBm Class-D Outphasing RF PA in 65 nm CMOS

An integrated reconfigurable engine for multi-purpose sensing up to 6 GHz

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