A 4.2mW 4K 6-8GHz CMOS LNA for Superconducting Qubit Readout

Çağlar, Alican; Winckel, S. Van; Brebels, S.; Wambacq, Piet; Craninckx, Jan

doi:10.1109/a-sscc53895.2021.9634832

Cited by 5 publications

(1 citation statement)

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“…Accordingly, recent progress has been focused on the design of cryo-CMOS integrated circuits and transceivers to realize the qubit manipulation, conversion, and error correction [5]- [7]. In this context, although earlier work managed to explore the cryogenic DC transfer characteristics of MOSFETs and evaluate the variation of temperature-related parameters with statistical analysis [8], the lack of a reliable cryo-CMOS compact model, which can cover the operations of superconductor/silicon-based qubits in the radiofrequency (RF) band (typically 2 -20 GHz), has restricted current cryogenic RF circuit designs only rely on insufficient experimental data of limited devices at a certain temperature point (4.2 K) [9]- [11]. Therefore, in order to implement large-scale integrated circuits suitable for full-fledged quantum computing applications, it is of great importance to characterize the RF performance of transistors with varied gate geometries and setup a generic cryo-CMOS RF compact model valid over the entire temperature and frequency ranges.…”

Section: Introductionmentioning

confidence: 99%

Cryogenic CMOS RF Device Modeling for Scalable Quantum Computer Design

Tang

Wang

A³

et al. 2022

IEEE J. Electron Devices Soc.

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This paper presents experimental RF characterizations and modeling on the nano-scale multi-finger gate MOSFETs of the HLMC 40 nm low-power CMOS technology. Both the resistive and capacitive components in the equivalent circuit model for the RF MOSFET devices are calibrated based on temperature-dependent S-parameter measurements (0.25 -40 GHz) from 298 K to 6 K. By integrating the intrinsic device model and the extrinsic parasitic parameters, a generic cryogenic device RF model is developed to capture the cutoff frequency and high-frequency performance of NMOS and PMOS transistors with varied device configurations. The establishment of validated database as functions of device size, temperature, and frequency responses lays a solid foundation for practical large-scale cryo-CMOS RF circuit design and optimization.

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