A 34% PAE, 26-dBm output power envelope-tracking CMOS power amplifier for 10-MHz BW LTE applications

Kang, Daehyun; Park, Byungjoon; Zhao, Chenxi; Kim, Dongsu; Kim, Jooseung; Cho, Yunsung; Jin, Sangsu; Jin, Hyun-Tak; Kim, Bumman

doi:10.1109/mwsym.2012.6259461

Cited by 29 publications

(19 citation statements)

References 6 publications

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“…A power calculation of LNA at 10MHz bandwidth with QPSK modulation is -30dBm as presented for 0.18µm CMOS technology for LTE application [8]. CMOS power amplifier achieves an efficiency of 34% for LTE signal [9]. Total power P total is expressed as P total = P signal + P P A + P ckt + P comp (6)…”

Section: Power Consumption Modelmentioning

confidence: 99%

Power analysis of LTE system for uplink scenario

Mittal

Bose

Shevgaonkar

2014

2014 Twentieth National Conference on Communications (NCC)

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There is a constant need to minimize power consumption at user equipment (UE) of wireless communication devices. In this paper we carry out the total power consumed at the handset for Long Term Evolution (LTE) systems. In uplink transmission, Single Carrier-Frequency Division Multiple Access (SC-FDMA) has been adopted as a transmission technology by 3GPP community people instead of Orthogonal Frequency Division Multiple Access (OFDMA) used for downlink transmission technology. SC-FDMA is categorized into Localized FDMA (LFDMA) and Interleaved FDMA (IFDMA). Here, we present the power analysis of LTE system for uplink scenario. We have taken three power components namely radio, circuit and computation power. The total power consumption has been compared between IFDMA and LFDMA transmission technology at a fixed bit error rate (BER) of 10 −5 . We have studied the effect of varying the number of Resource Blocks (RBs) on the total power consumed. We demonstrate through our simulation that at smaller number of RBs (16, 32) LFDMA performances is better as compared to IFDMA in terms of total power consumption.

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Section: Power Consumption Modelmentioning

confidence: 99%

Power analysis of LTE system for uplink scenario

Mittal

Bose

Shevgaonkar

2014

2014 Twentieth National Conference on Communications (NCC)

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“…Low drop-out regulators and switching regulators are not good choice for the bias modulator due to low efficiency and narrow bandwidth, respectively [3,4]. The hybrid bias modulators, which have a highly efficient switching stage and a broadband linear stage, have been popular for the ET applications [6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22]. The switching stage supplies most of the current which are around very low frequency including DC.…”

Section: Introductionmentioning

confidence: 99%

“…Therefore, the bias modulators, which are generally designed using CMOS process, have been generally applied to those PAs using GaAs HBT or SiGe BiCMOS processes for higher performance [13][14][15][16][17][18][19][20]. However, the PAs based on CMOS process has great advantages in lower cost and higher integration in spite of its relatively poor performances [23][24][25].…”

Section: Introductionmentioning

confidence: 99%

A CMOS Envelope Tracking Power Amplifier for LTE Mobile Applications

Ham¹,

Jung²,

Kim³

et al. 2014

JSTS:Journal of Semiconductor Technology and Science

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Abstract-This paper presents an envelope tracking power amplifier using a standard CMOS process for the 3GPP long-term evolution transmitters. An efficiency of the CMOS power amplifier for the modulated signals can be improved using a highly efficient and wideband CMOS bias modulator. The CMOS PA is based on a two-stage differential common-source structure for high gain and large voltage swing. The bias modulator is based on a hybrid buck converter which consists of a linear stage and a switching stage. The dynamic load condition according to the envelope signal level is taken into account for the bias modulator design. By applying the bias modulator to the power amplifier, an overall efficiency of 41.7 % was achieved at an output power of 24 dBm using the 16-QAM uplink LTE signal. It is 5.3 % points higher than that of the power amplifier alone at the same output power and linearity.

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“…Conventional EER structures are nonlinear due to delay mismatch between the amplitude and the phase path, and further, they run into a leakage problem due to a large input power injection even for a low output operation [8]. The ET technique is less sensitive to the delay mismatch [9], and enables a linear operation by utilizing a linear PA and supply modulator without additional linearization technique [10] to improve the efficiency of the PA.…”

Section: ⅰ Introductionmentioning

confidence: 99%

“…HARMONIC CONTROL FOR LINEAR CMOS PA Fig. 1 shows the schematic design of the CMOS PA with the hybrid supply modulator [10]. The basic structure of the PA is a differential-cascode structure that uses a transformer at the output [10 13].…”

Section: ⅰ Introductionmentioning

confidence: 99%

CMOS Linear Power Amplifier with Envelope Tracking Operation (Invited Paper)

Park¹,

Kim²,

Cho³

et al. 2014

Journal of electromagnetic engineering and science

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A differential-cascode CMOS power amplifier (PA) with a supply modulator for envelope tracking (ET) has been implemented by 0.18 μm RF CMOS technology. The loss at the output is minimized by implementing the output transformer on a FR-4 printed circuit board (PCB). The CMOS PA utilizes the 2 nd harmonic short at the input to enhance the linearity. The measurement was done by the 10 MHz bandwidth 16QAM 6.88 dB peak-to-average power ratio long-term evolution (LTE) signal at 1.85 GHz. The ET operation of the CMOS PA with the supply modulator enhances the power-added efficiency (PAE) by 2.5, to 10% over the stand-alone CMOS PA for the LTE signal. The ET PA achieves a PAE of 36.5% and an ACLRE-UTRA of -32.7 dBc at an average output power of 27 dBm.Key Words: CMOS, Envelope Tracking, Long-Term Evolution, Power Amplifier, Supply Modulator.

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A 34% PAE, 26-dBm output power envelope-tracking CMOS power amplifier for 10-MHz BW LTE applications

Cited by 29 publications

References 6 publications

Power analysis of LTE system for uplink scenario

Power analysis of LTE system for uplink scenario

A CMOS Envelope Tracking Power Amplifier for LTE Mobile Applications

CMOS Linear Power Amplifier with Envelope Tracking Operation (Invited Paper)

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