A 256/spl times/256 CMOS differential passive pixel imager with FPN reduction techniques

Fujimori, Iliana L.; Wang, Ching-Chun; Sodini, C.G.

doi:10.1109/4.890319

Cited by 35 publications

(8 citation statements)

References 17 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The ADC Differential Non-Linearity (DNL) of the same ADC has also been characterized to be smaller than +0.33/-0.66 LSB peak to peak. The fixed pattern noise (FPN) can be eliminated by CDS circuit operation [7], the measured results show that the nonlinear offset and gain responses of 24 test pixel-level ADCs are almost consistent. The power consumption of each pixel-level ADC is about 90 µW.…”

Section: Testing and Discussionmentioning

confidence: 99%

Conceptual design of 3D integrated pixel sensors for the innermost layer of the ILC vertex detector

Hu-Guo

Dorokhov

et al. 2011

J. Inst.

View full text Add to dashboard Cite

The paper presents a design of CMOS Pixel Sensor (CPS) using the vertical integration technology (3DIT), expected to alleviate the most essential limitations of 2D-CPS. Our objective is to develop an intelligent architecture in order to meet the requirements of the innermost layer of the International Linear Collider (ILC) vertex detectors, which are particularly demanding in spatial resolution of less than 3 µm and associated frame readout time of 10 µs. The sensor, with a pixel pitch of 23 µm, will be composed of 3-tiers Integrated Circuits (IC) with different functionalities: detection with in pixel analogue processing, pixel-level 3-bit Analogue to Digital Conversion (ADC) and fast parallel sparse readout.

show abstract

Section: Testing and Discussionmentioning

confidence: 99%

Conceptual design of 3D integrated pixel sensors for the innermost layer of the ILC vertex detector

Hu-Guo

Dorokhov

et al. 2011

J. Inst.

View full text Add to dashboard Cite

show abstract

“…1(b) and therefore it does not affect the pixels fill factor. The processing circuits is chosen to be shared between 4 photodiodes, to avoid the charge signal from the photodiodes output being affected by disturbances in a long column line [14]. The amplifier is a single input, single output cascode common source amplifier, operating in weak inversion with 10nA biasing current and 3.3V supply voltage.…”

Section: = (5)mentioning

confidence: 99%

Compact pixel architecture for CMOS lateral flow immunoassay readout systems

Pilavaki

Valente

Serdijn

et al. 2017

2017 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)

View full text Add to dashboard Cite

A novel pixel architecture for CMOS image sensors is presented. It uses only one amplifier for both integration of the photocurrent and in-pixel noise cancelation, thus minimizing power consumption. The circuit is specifically designed to be used in readout systems for lateral flow immunoassays. In addition a switching technique is introduced enabling the use of column correlated double sampling technique in capacitive transimpedance amplifier pixel architectures without the use of any memory cells. As a result the reset noise which is crucial in these architectures can be suppressed. The circuit has been designed in a 0.35-μm CMOS technology and simulations are presented to show its performance.

show abstract

“…The large area TFT image sensors using PIN photodiode as the light sensing device are well applied for X-ray imaging for many years. They are mainly in the structure of the passive pixel sensing circuit (PPS) [1][2]. However, the sensitivity of the TFT sensors may not be good enough to sense the optical fingerprint signal, especially when they are put under displays.…”

Section: Introductionmentioning

confidence: 99%

36.1: Invited Paper: Comparison in the Performance of Passive and Active TFT Pixel Sensing Circuits Using PIN Photodiode as the Light Sensing Device

Tai

2021

Symp Digest of Tech Papers

View full text Add to dashboard Cite

The large area TFT image sensors using PIN photodiode as the light sensing device attract attention owing to their application in optical fingerprint sensors under displays. Different structures of the pixel sensing circuits are compared in the aspect of output signal, settling time, photo current collection, as well as variation of TFT. Even though the active pixel sensing circuits (APS) are expected to provide better performance intuitively, the passive pixel sensing circuits (PPS) can surpass APS for practical purpose.

show abstract

A 256/spl times/256 CMOS differential passive pixel imager with FPN reduction techniques

Cited by 35 publications

References 17 publications

Conceptual design of 3D integrated pixel sensors for the innermost layer of the ILC vertex detector

Conceptual design of 3D integrated pixel sensors for the innermost layer of the ILC vertex detector

Compact pixel architecture for CMOS lateral flow immunoassay readout systems

36.1: Invited Paper: Comparison in the Performance of Passive and Active TFT Pixel Sensing Circuits Using PIN Photodiode as the Light Sensing Device

Contact Info

Product

Resources

About