A 2.4-ghz 0.18-μm cmos self-biased cascode power amplifier

Sowlati, T.; Leenaerts, D.M.W.

doi:10.1109/jssc.2003.814417

Cited by 224 publications

(78 citation statements)

References 6 publications

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“…By using self-biasing [80], the supply voltage can be evenly distributed over the two devices. Two similar devices (high performance or high breakdown) can then be used, giving larger design space for voltage swing, reliability, and performance.…”

Section: Circuit Solutionsmentioning

confidence: 99%

A Review of Watt-Level CMOS RF Power Amplifiers

Johansson

Fritzin

2014

IEEE Trans. Microwave Theory Techn.

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Abstract-This paper reviews the design of watt-level integrated CMOS RF power amplifiers (PAs) and state-of-the-art results in the literature. To reach watt-level output power from a single-chip CMOS PA, two main strategies can be identified: use of high supply voltage, and use of matching and power combination. High supply voltage limits are closely related to device design in the fabrication process. However, the maximum operating voltage can be improved by amplifier class selection, circuit solutions, and process modifications or mask changes. High output power can also be reached by the use of on-chip matching and power combination, commonly using on-chip transformers. Reliability often sets the limits for the PA design, and PA degradation mechanisms are reviewed. A compilation of state-of-the-art published results for linear and switched wattlevel PAs, as well as a few fully integrated CMOS PAs, is presented and discussed.

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Section: Circuit Solutionsmentioning

confidence: 99%

A Review of Watt-Level CMOS RF Power Amplifiers

Johansson

Fritzin

2014

IEEE Trans. Microwave Theory Techn.

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“…1(d) shows a simplified schematic of the differential PA used in this work. The thick gate device M2 is used to prevent the oxide breakdown and the hot carrier degradation, and to make it possible to use a higher supply voltage [4]. Moreover, the cascode configuration improves the stability of the PA due to better isolation.…”

Section: Driver Amplifier Stage With Varactor Tuned Loadmentioning

confidence: 99%

“…Hence, it is needed to improve the linearity and efficiency of the PA at the average power simultaneously for the OFDM based RF transmitter. Several papers present techniques to achieve these requirements on a CMOS die [1,2,3,4]. A recently published CMOS Doherty amplifier apparently improves the efficiency at back off power and gives us a possibility of a fully integrated CMOS Doherty PA [1].…”

Section: Introductionmentioning

confidence: 99%

A 2.3GHz linearized CMOS power amplifier with AM-AM and AM-PM distortion correction

Yoo

Baek

Chun

et al. 2010

IEICE Electron. Express

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A linearized 2.3 GHz CMOS power amplifier with AM-AM and AM-PM distortion correction is presented. The varactors are used at the driver amplifier load to correct the phase distortion and gate bias control of the PA to compensate the amplitude distortion. The proposed CMOS PA has been implemented in 0.13 µm CMOS technology. The measured results show that P 1 dB is increased 1.6 dB and PAE is improved from 5.5% to 9% at the condition of −28 dB EVM, respectively.

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“…Even if the SOI process overcomes the substrate loss issue with a high-resistivity insulator beneath the buried oxide, the other issues must be taken care of at the circuit level, as in the bulk CMOS process [1,2]. A cascode structure provides a solution for a low breakdown voltage [3,4]. A differential structure creates a virtual ground point and releases the source degeneration effect by a source-to-ground bonding wire [5].…”

Section: ⅰ Introductionmentioning

confidence: 99%

CMOS Linear Power Amplifier with Envelope Tracking Operation (Invited Paper)

Park¹,

Kim²,

Cho³

et al. 2014

Journal of electromagnetic engineering and science

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A differential-cascode CMOS power amplifier (PA) with a supply modulator for envelope tracking (ET) has been implemented by 0.18 μm RF CMOS technology. The loss at the output is minimized by implementing the output transformer on a FR-4 printed circuit board (PCB). The CMOS PA utilizes the 2 nd harmonic short at the input to enhance the linearity. The measurement was done by the 10 MHz bandwidth 16QAM 6.88 dB peak-to-average power ratio long-term evolution (LTE) signal at 1.85 GHz. The ET operation of the CMOS PA with the supply modulator enhances the power-added efficiency (PAE) by 2.5, to 10% over the stand-alone CMOS PA for the LTE signal. The ET PA achieves a PAE of 36.5% and an ACLRE-UTRA of -32.7 dBc at an average output power of 27 dBm.Key Words: CMOS, Envelope Tracking, Long-Term Evolution, Power Amplifier, Supply Modulator.

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A 2.4-ghz 0.18-μm cmos self-biased cascode power amplifier

Cited by 224 publications

References 6 publications

A Review of Watt-Level CMOS RF Power Amplifiers

A Review of Watt-Level CMOS RF Power Amplifiers

A 2.3GHz linearized CMOS power amplifier with AM-AM and AM-PM distortion correction

CMOS Linear Power Amplifier with Envelope Tracking Operation (Invited Paper)

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