Abstract:A 16.8 Gbps/channel single-ended transceiver for SiP-based DRAM interface on silicon carrier channel is proposed in this paper. A transmitter, receiver, and channel are all included in a single package as SiP. A current mode 4:1 MUX with 1-tap feed-forward equalizer (FFE) is used as a serializer, and this 4:1 MUX uses 25% duty clock to prevent short circuit current when consecutive 2-phase clocks overlap. Additionally, an open drain output driver with asynchronous type 1-tap FFE is used in the transmitter. Bec… Show more
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