A 110μW single-bit continuous-time ΔΣ converter with 92.5dB dynamic range

Abstract

A third-order single-bit CTmodulator for generic biomedical applications is implemented in a 0.15-μm FD-SOI CMOS process. The overall power efficiency is attained by employing a single-bit quantizer and thus avoiding the mismatch shaping logic. The loop filter coefficients are determined using a systematic design centering approach by accounting for the integrator non-idealities. The single-bit CTmodulator consumes 110μW power from a 1.5-V power supply when clocked at 6.144MHz. The simulation results for the modulator exhibit a dynamic range of 94.4 dB and peak SNDR of 92.4 dB for 6 kHz signal bandwidth. The figure of merit (FoM) of this third-order, single-bit CTmodulator is 0.271pJ/level.

A Low-Power Single-Bit Continuous-Time ΔΣ Converter with 92.5 dB Dynamic Range for Biomedical Applications

“…This invited paper presents an expanded and detailed discussion on our previous work reported in [5]. The remainder of this paper is organized as follows.…”

“…Many such modulators have been reported over previous decades [8,9]. However, in recent years, the continuous-time delta-sigma (CT-ΔΣ) ADC is being preferred in low-power signal-processing applications due to several attractive features like an inherent anti-aliasing filter (AAF), relaxed bandwidth requirements of the active elements and lower power consumption when compared to their discrete-time counterparts [3,5,7].…”

“…Delta-sigma modulation based ADCs employing an oversampling technique are a well-known candidate for achieving higher resolution analog-to-digital conversion using a low-resolution quantizer [2][3][4][5]. Using oversampling techniques, the quantization noise introduced by the low-resolution quantizer is pushed outside the signal bandwidth, which results in higher resolution (SNR) and dynamic range (DR).…”

“…Also, ΔΣ ADCs are well-suited for digitizing biomedical signals without requiring any instrumentation amplifier. When compared to other conventional ADCs, small differential-mode signal can be recovered with high resolution using a ΔΣ modulator [2][3][4][5].…”

“…The ΔΣ ADC is also proven to be well suitable for low-bandwidth signal conversion by employing oversampling, and is robust to device mismatches in the forward signal path when using nano-CMOS processes [5][6][7]. Traditionally, discrete-time (DT) ΔΣ ADC were the commonly used ΔΣ architecture.…”