A 10 mW 60GHz 65nm CMOS DCO with 24% tuning range and 40 kHz frequency granularity

Hussein, Ahmed I.; Saberi, Shadi; Paramesh, Jeyanandh

doi:10.1109/cicc.2015.7338482

Cited by 10 publications

(4 citation statements)

References 9 publications

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“…At 66.4-GHz, the measured PN is −98.2 dBc/Hz at a 1-MHz offset, and −120.1 dBc/Hz at a 10-MHz offset, resulting in an FoM of −183.2 dB at a 1-MHz offset and −185.1 dB at a 10-MHz offset. Thanks to the optimized three-winding transformer, this fundamental DCO achieves a good tradeoff between the tuning range and PN, as compared with [10] and [11]. Compared with the harmonic extraction architectures [6], [7], this DCO works at a higher frequency, thus occupying a lower silicon area.…”

Section: Measurementsmentioning

confidence: 99%

“…The third architecture is mainly limited by PN due to the 120-GHz resonators' quality (Q) factor [9]. Compared with alternatives, a 60-GHz fundamental oscillator with high output power, compact area, and moderate PN is preferred for the cost-efficient FHDF Doppler radar system [10], [11]. This letter presents a fundamental 60-GHz DCO featuring a threewinding transformer.…”

Section: Introductionmentioning

confidence: 99%

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Three-Winding Transformer-Based 60-GHz DCO With −185.1-dB FoM in 40-nm CMOS

Fang

Staszewski

Gao

2022

IEEE Solid-State Circuits Lett.

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Section: Measurementsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Three-Winding Transformer-Based 60-GHz DCO With −185.1-dB FoM in 40-nm CMOS

Fang

Staszewski

Gao

2022

IEEE Solid-State Circuits Lett.

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“…On top of the intrinsic 1/ √ LC nonlinearity, DCOs may also exhibit a random or periodic nonlinearity due to mismatch within the digitally-controlled capacitor bank. Figure 3.3 presents a typical class-B LC oscillator where the resonant tank includes a fixed inductor L T and a digitally-controlled capacitor C T x , which is typically implemented using high-quality metal-metal capacitors with near-zero temperature and voltage coefficients [10]. However, the parasitic capacitance C p of the MOS devices (e.g.…”

Section: Adaptive Digital Pre-distortionmentioning

confidence: 99%

Chirp Generators for Millimeter-Wave FMCW Radars

Cherniak

Levantino

2019

Special Topics in Information Technology

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The vast number of radar applications generates the demand for highly-linear, low-noise, fast chirp generators implemented in nanoscale CMOS technologies. Off-the-shelf chirp synthesizers are realized in BiCMOS technologies and demonstrate excellent phase noise performances, though, at high cost and limited modulation speed. This chapter describes a new class of fast and reconfigurable chirp generators based on digital bang-bang phase-locked loops, suitable for integration in modern CMOS processes. After analyzing the impact of the chirp generator impairments on a frequency-modulated continuous-wave (FMCW) radar system, a novel pre-distortion scheme for the linearization of critical blocks is introduced to achieve at the same time low phase noise and fast linear chirps. The chirp generator fabricated in 65-nm CMOS technology demonstrates above-state-of-the-art performance: It is capable of generating chirps around 23-GHz with slopes up to 173 MHz/µs and idle times of less than 200 ns with no over or undershoot after an abrupt frequency step. The circuit consuming 19.7 mA exhibits a phase noise of −100 dBc/Hz at 1 MHz offset from the carrier and a worst case in-band fractional spur level below −58 dBc. Keywords CMOS • Phase-locked loops • Radar 3.1 Introduction Cost reduction is the cornerstone in nowadays radar systems. The radar technology, which has been for a long time, since the invention in early 1930s, exclusive to military and defence, is now being adopted in a wide spectrum of applications This work has been supported by Infineon Technologies, Austria.

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“…The field maps also predict that it will be easier to achieve better linearity for larger frequency spans at higher frequencies. This could explain why DCOs [42], [43], and [44] managed to get relatively good linearity by sheer opportunity at such high frequencies using switch capacitor banks without much explanation as to why.…”

Section: Topographical Linearity Field-mapsmentioning

confidence: 99%

Design of a Linear LC Digitally Controlled Oscillator Using Topographical Field Maps

Abdullah¹

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A 10 mW 60GHz 65nm CMOS DCO with 24% tuning range and 40 kHz frequency granularity

Cited by 10 publications

References 9 publications

Three-Winding Transformer-Based 60-GHz DCO With −185.1-dB FoM in 40-nm CMOS

Three-Winding Transformer-Based 60-GHz DCO With −185.1-dB FoM in 40-nm CMOS

Chirp Generators for Millimeter-Wave FMCW Radars

Design of a Linear LC Digitally Controlled Oscillator Using Topographical Field Maps

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