1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156)
DOI: 10.1109/isscc.1998.672475
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A 10 Gb/s Si-bipolar TX/RX chipset for computer data transmission

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Cited by 23 publications
(6 citation statements)
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“…The first applicable paper seriously examined when this project began described a complete monolithic10Gb/s TX/RX chipset [2] in a 25GHz fT Si-Bipolar process, published in 1998, which was used as a launching point for the work. This paper described a method of using multiphase clocks to extract timing information for a high speed receiver.…”
Section: Chapter 3 State Of the Artmentioning
confidence: 99%
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“…The first applicable paper seriously examined when this project began described a complete monolithic10Gb/s TX/RX chipset [2] in a 25GHz fT Si-Bipolar process, published in 1998, which was used as a launching point for the work. This paper described a method of using multiphase clocks to extract timing information for a high speed receiver.…”
Section: Chapter 3 State Of the Artmentioning
confidence: 99%
“…A novel method of generating quadrature signals at the same frequency as a reference is given in [24]. The "leap frog" architecture mentioned in [2] achieves a higher frequency of operation over a traditional ring of buffers/inverters via the 50-50 interpolation of the phase entering each buffer with the previous phase signal. The frequency control is implemented via variable propagation delay in the buffers.…”
Section: Vcosmentioning
confidence: 99%
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“…In particular, IMPS is focused on the signal integrity, such as controlled impedance signal transmission with very low crosstalk. The electrical interconnection described by Walker et al provides a 10-Gb/s link over a distance of less than 20 m using coaxial cable [6]. However, coaxial cabling is bulky; therefore, it is not suitable for a high-density interconnection application.…”
Section: Introductionmentioning
confidence: 99%