A 10-Bit 500Ms/s Two-Step Flash ADC

Çelebi, Anıl; Aytar, Oktay; Tangel, Ali

doi:10.1109/eurcon.2005.1630090

Cited by 14 publications

(10 citation statements)

References 11 publications

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“…The input signal and clocks are placed on the top and bottom, respectively to isolate analog signal from digital signal. The conversion blocks are placed sequentially with the signal processing flow, in order to shorten their routing distance, and hence, delay [9,10]. The total chip area occupies 2.22 mm 2 (3700 um×600 um).…”

Section: Measurement Resultsmentioning

confidence: 99%

Design of a 6-bit 500MS/s CMOS A/D Converter with Comparator-based Input Voltage Range Detection Circuit

Dae

Yoon

2014

JSTS:Journal of Semiconductor Technology and Science

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Section: Measurement Resultsmentioning

confidence: 99%

Design of a 6-bit 500MS/s CMOS A/D Converter with Comparator-based Input Voltage Range Detection Circuit

Dae

Yoon

2014

JSTS:Journal of Semiconductor Technology and Science

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“…The conversion blocks are placed sequentially with the signal processing flow, in order to shorten their routing distance, and hence, delay [9] . Clock generation and output buffers are placed away from the analog cores to suppress the substrate noise coupling.…”

Section: ⅲ Measurement Resultsmentioning

confidence: 99%

Design of a 6-bit 500MS/s CMOS A/D Converter with Comparator-Based Input Voltage Range Detection Circuit

Shi¹,

Lee²,

Yoon³

2013

The Journal of Korea Information and Communications Society

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“…Meanwhile, to get the CMOS transistor channel L of each first inverter refers to the mathematical expression of the threshold voltage (V th ) of any quantized sub-unit can be derived approximately as Eq. (2) [13,14].…”

Section: Tiq Comparatormentioning

confidence: 99%

A low power serial output flash ADC in 0,18 µm CMOS process

Reaz

Amin

et al. 2015

Teh. vjesn.

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Original scientific paper This paper proposes a simple design of a flash analog-to-digital converter (ADC) in 0,18 μm CMOS technology. This ADC is expected to be used within a temperature sensor, which provides analog data output having a range of 360 mV to 560 mV. This system consists of three main blocks: the threshold inverter quantization (TIQ)-comparator, encoder and parallel input serial output (PISO) register. The design goal is to get a flash ADC with low power dissipation, small size and compatible with the temperature sensors. The method is proposed to set each of the transistor channel length, for finding out the threshold voltage difference of the inverter each on the TIQ comparator. The design has an input range of 285 to 600 mV and 6-bit resolution output. The chip area of the designed ADC is 844,48 × 764,77 µm 2 and the power dissipation is 0,162 µW with 1,6 V supply voltage. Keywords: CMOS, Comparator, Flash ADC, Temperature Sensor Serijski izlazni impulsni ADC male snage u 0,18 µm CMOS postupkuIzvorni znanstveni članak U radu se predlaže jednostavan projekt impulsno analogno-digitalnog pretvarača (ADC) u 0,18 μm CMOS tehnologiji. Taj bi se pretvarač trebao koristiti u senzoru temperature, koji daje izlaz analognih podataka u rasponu od 360 mV do 560 mV. Sustav se sastoji od tri glavna bloka: threshold inverter quantization (TIQ) -komparatora, kodnog uređaja (kodera) i parallel input serial output (PISO) registra. Svrha je projekta dobiti impulsni ADC s malim gubitkom energije, malih dimenzija i kompatibilnim sa senzorima temperature. Ovom bi se metodom trebala podesiti dužina svakog kanala tranzistora u svrhu pronalaženja razlike u ulaznom naponu pretvarača na TIQ komparatoru. Projektom se predviđa ulazni raspon od 285 do 600 mV i izlaz rezolucije 6-bita. Površina čipa projektiranog ADC je 844,48 × 764,77 µm 2 a gubitak energije iznosi 0,162 µW uz napajanje od 1,6 V.

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A 10-Bit 500Ms/s Two-Step Flash ADC

Cited by 14 publications

References 11 publications

Design of a 6-bit 500MS/s CMOS A/D Converter with Comparator-based Input Voltage Range Detection Circuit

Design of a 6-bit 500MS/s CMOS A/D Converter with Comparator-based Input Voltage Range Detection Circuit

Design of a 6-bit 500MS/s CMOS A/D Converter with Comparator-Based Input Voltage Range Detection Circuit

A low power serial output flash ADC in 0,18 µm CMOS process

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