A 1 GHz power efficient single chip multiprocessor system for broadband networking applications

Abstract

The Broadcom BCM12500 is a high performance system on a chip (SOC) targeted at network centric tasks. The chip consists of two high performance SB-1 MIPS64m CPU's, a shared 512KB L2 cache, a DDR memory controller, and integrated UO. All major blocks of the processor are connected together via the ZBbusTM; a high speed split transaction fully coherent multi processor bus.Three Gigabit Ethernet MAC's enable a direct interface to network elements. High-speed system U 0 is provided using AMD's Lightning Data Transport (LDTm) U 0 fabric and a 66MHz PCI bus. The die measures 14.2" by 13.3" in a bulk 0.15pm CMOS technology and has a power dissipation of 13W at 1.2V and 1GHz.

Communication performance of a modular high-bandwidth multiprocessor system

“…In addition, zero-copy NIC buffer management has been pursued for further processing time reduction by not buffering messages in the NIC, but rather using message payload DMA to host buffers instead [4,13]. Zero-copy, DMA fast messaging is supported by our BCM 1480 chips [12], as reviewed next.…”

“…We have implemented a multiprocessor, making use of BCM 1480 chips (which are homogeneous multicore processors) developed by Broadcom [12]. The implemented multiprocessor employs directory-based cache coherence to arrive at high modularity and scalability.…”