A 1.4V 25mW Inductorless Wideband LNA in 0.13¿m CMOS

Ramzan, Rashad; Andersson, Stefan; Dąbrowski, Jerzy; Svensson, Christer

doi:10.1109/isscc.2007.373475

Cited by 49 publications

(30 citation statements)

References 4 publications

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“…It occupies 0.87×0.5mm 2 of die area including all pads. Similar or better results are achieved by this IC compared with recent broadband CMOS LNA publications [1,[3][4][5][6]. …”

supporting

confidence: 82%

A compact low-noise weighted distributed amplifier in CMOS

Wang

Hajimiri

2009

2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers

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The noise figure (NF) of a front-end low-noise amplifier (LNA) places a lower bound on the sensitivity of a receiver. In a conventional LNA, there is a tradeoff between the intrinsic input capacitance of the input transistors and the achievable bandwidth (BW) of the amplifier. This makes it necessary to use smaller transistors at higher gate overdrive voltages to simultaneously achieve greater BW and better NF. Unfortunately, biasing the transistor in this fashion yields a power-inefficient design. Furthermore, the need for a smaller capacitance presents a challenge to electrostatic discharge (ESD) protection of the input due to its added capacitance.One possible way to overcome this noise-bandwidth trade-off is to use distributed amplifiers (DA), where the input and output parasitic capacitances of the individual amplification stages are absorbed into a transmission line (T-line) and become part of its real impedance. In a standard DA, the output currents of equally-weighted (identical-stages) transconductance (G m ) stages propagate through the output T-line and add coherently at the load. This leads to a broadband response fundamentally limited by the cutoff frequency of the synthetic T-lines. It has been shown that it is possible to design low-noise equally-weighted DAs at reasonable power levels [1].Allowing the transconductance (G m ) of different stages of a DA to be different provides us with an added degree of freedom in the design and optimization of a DA. A weighted distributed amplifier (WDA), shown in Fig. 12.3.1, can be viewed as an analog finite-impulse-response (FIR) system. Looking at the noise in such a WDA, the noise at the output is a weighted sum of noise propagating through different paths with different weights for each noise source. We can use this property to shape the profile of the output noise power spectrum by changing the G m coefficients of different stages. With proper choice of G m 's, the NF within a given frequency range can be reduced without a major penalty on the power consumption, gain, and input matching. This noise shaping can be applied to different noise sources in the circuit. For example, the noise current contribution of the input termination resistor R i to the output voltage noise is weighted by:where G m,k is the k-th block transconductance, τ is the T-line section delay, and f is the frequency. This is a more general result that reduces to the sinc function response for an equally-weighted DA. For instance, it can be used for noise profile shaping, optimization, and even dynamic noise notching at a selected frequency.A comparison of the noise contours of a conventional five-stage DA and a fivestage WDA is shown in Fig. 12.3.2, taking into account all the active and passive noise sources. In these plots, the worst-case NF across the 3-to-10.6GHz frequency band for each design is plotted vs. the gate-source voltage and total amplifier bias current for the DA and the WDA. The contours show that the WDA can provide a lower worst-case NF under the same bias conditions...

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“…It occupies 0.87×0.5mm 2 of die area including all pads. Similar or better results are achieved by this IC compared with recent broadband CMOS LNA publications [1,[3][4][5][6]. …”

supporting

confidence: 82%

A compact low-noise weighted distributed amplifier in CMOS

Wang

Hajimiri

2009

2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers

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“…Based on the calculated FOM in Table I, this work has a good performance and is better than all the other works expect for [9].…”

Section: Measurement Resultsmentioning

confidence: 83%

“…However, the insertion loss of the passive input matching degrades the NF rapidly with frequency. Resistive-feedback amplifiers [6], [8], [9], [10] have very good wideband input matching characterisitc. However, low NF and low power consumption can be hardly achieved simultaneously across a large frequency range.…”

Section: Introductionmentioning

confidence: 99%

An Ultra-Wideband Resistive-Feedback Low-Noise Amplifier with Noise Cancellation in 0.18μm Digital CMOS

Zhu

2008

2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems

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Abstract-We present a wideband resistive feedback CMOS low-noise amplifier (LNA) with noise cancellation technique for ultra-wideband applications. The LNA achieves a 3-dB bandwidth of 0.7 -6.5GHz, power gain of 12.5dB, and noise figure of 3.5 -4.2dB within the 3-dB bandwidth. The input matching is better than -11dB from 0.7 to 12GHz. The IIP3 is measured -5dBm at 5GHz. It is implemented in a, and consumes 11.1mW from a 1.8V supply.

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“…따라서 새로운 구조의 광대역 저잡음 증폭기에 그림 1. GPS 수신기의 블록도 대한 연구가 활발히 진행되고 있으며, 본 논문에서 는 그림 2와 같은 구조의 공통 드레인 피드백 증폭 기를 사용하였다 [3], [4] . 의한 잡음을 나타내고, V 2 nRS는 입력 저항 Rs에 의한 잡음을 나타낸다.…”

Section: -1 광대역 저잡음 증폭기unclassified

Design of the RF Front-end for L1/L2 Dual-Band GPS Receiver

Kim¹,

Oh²,

Jeon³

et al. 2010

The Journal of Korean Institute of Electromagnetic Engineering

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이다. AbstractThe RF front-end for L1/L2 dual-band Global Positioning System(GPS) receiver is presented in this paper. The RF front-end(down-converter) using low IF architecture consists of a wideband low noise amplifier(LNA), a current mode logic(CML) frequency divider and a I/Q down-conversion mixer with a poly-phase filter for image rejection. The current bleeding technique is used in the LNA and mixer to obtain the high gain and solve the head-room problem. The common drain feedback is adopted for low noise amplifier to achieve the wideband input matching without inductors. The fabricated RF front-end using 0.18μm CMOS process shows a gain of 38 dB for L1 and 41 dB for L2 band.The measured IIP3 is -29 dBm in L1 band and -33 dBm in L2 band, The input return loss is less than -10 dB from 50 MHz to 3 GHz. The measured noise figure(NF) is 3.81 dB for L1 band and 3.71 dB for L2 band. The image rejection ratio is 36.5 dB. The chip size of RF front end is 1.2×1.35 mm 2 .

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A 1.4V 25mW Inductorless Wideband LNA in 0.13¿m CMOS

Cited by 49 publications

References 4 publications

A compact low-noise weighted distributed amplifier in CMOS

A compact low-noise weighted distributed amplifier in CMOS

An Ultra-Wideband Resistive-Feedback Low-Noise Amplifier with Noise Cancellation in 0.18μm Digital CMOS

Design of the RF Front-end for L1/L2 Dual-Band GPS Receiver

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A 1.4V 25mW Inductorless Wideband LNA in 0.13¿m CMOS

Cited by 49 publications

References 4 publications

A compact low-noise weighted distributed amplifier in CMOS

A compact low-noise weighted distributed amplifier in CMOS

An Ultra-Wideband Resistive-Feedback Low-Noise Amplifier with Noise Cancellation in 0.18&#956;m Digital CMOS

Design of the RF Front-end for L1/L2 Dual-Band GPS Receiver

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Product

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An Ultra-Wideband Resistive-Feedback Low-Noise Amplifier with Noise Cancellation in 0.18μm Digital CMOS