A 1.2mW/channel 100µm-Pitch-Matched Transceiver ASIC with Boxcar-Integration-Based RX Micro-Beamformer for High-Resolution 3D Ultrasound Imaging

A low‐power and area‐efficient ultrasound receiver using beamforming successive approximation register analog‐to‐digital converter with capacitive digital‐to‐analog converter combined delay cell structure for 3‐D imaging systems

“…[2] Ref. [3] 7b). The power and area consumption of the regulator per channel can be mitigated, given that a large number of sub-arrays share the reference generation in 3-D imaging applications.…”

“…Introduction: Endoscopic and catheter-based three-dimensional (3-D) ultrasound imaging systems are getting more attention in intravascular ultrasonography and intracardiac echocardiography applications by enabling fast intraoperative ultrasound examinations with relatively low cost and high spatial resolution. The 2-D transducer arrays integrated on the pitch-matched ASIC have been implemented as a feasible solution for the implantable miniaturized ultrasound system [1][2][3][4]. The critical challenge is to acquire the data from a large number of transducer channels under the stringent requirements of a small array pitch for high spatial resolution and low power consumption to avoid tissue temperature rise.…”

“…The per-channel analog-to-digital converter (ADC) makes it challenging to achieve miniaturization, improved spatial resolution, and power efficiency [1]. Subarray analog beamforming effectively reduces the number of ADCs, aligning the echo signals from adjacent transducers by delaying and summing, followed by per-subarray ADCs to lower the channel count for the further digital beamforming operation [2][3][4].…”

“…Given that the delay-and-sum (DAS) and digitization are mainly implemented by a switched capacitor circuit, integrating/summing amplifier, ADC buffer, and successive approximation register (SAR) ADC [2], the per channel area and power consumption is highly affected by the total capacitance and use of the active circuitry in the sub-array beamformer. The current mode summation with boxcar integration in [3] minimizes the number of capacitive delay cells but still requires the current integrating amplifiers. The DAS is implemented with the charge domain combined with a charge-sharing SAR ADC [4], removing the ADC buffer.…”