Atrial fibrillation (AF) is the most common 1 cardiac arrhythmia and is normally treated by RF ablation. 2 Intracardiac echography (ICE) is widely employed during RF 3 ablation procedures to guide the electrophysiologist in nav-4 igating the ablation catheter, although only 2-D probes are 5 currently clinically used. A 3-D ICE catheter would not only 6 improve visualization of the atrium and ablation catheter, but 7 it might also provide the 3-D mapping of the electromechan-8 ical wave (EW) propagation pattern, which represents the 9 mechanical response of cardiac tissue to electrical activity. 10 The detection of this EW needs 3-D high-frame-rate imaging, 11 which is generally only realizable in tradeoff with channel 12 count and image quality. In this simulation-based study, 13 we propose a high volume rate imaging scheme for a 3-D 14 ICE probe design that employs 1-D micro-beamforming in 15 the elevation direction. Such a probe can achieve a high 16 frame rate while reducing the channel count sufficiently for 17 realization in a 10-Fr catheter. To suppress the grating-lobe 18 (GL) artifacts associated with micro-beamforming in the 19 elevation direction, a limited number of fan-shaped beams 20 with a wide azimuthal and narrow elevational opening angle 21 are sequentially steered to insonify slices of the region of 22 interest. An angular weighted averaging of reconstructed 23 subvolumes further reduces the GL artifacts. We optimize 24 the transmit beam divergence and central frequency based 25 on the required image quality for EW imaging (EWI). Numer-26 ical simulation results show that a set of seven fan-shaped 27 transmission beams can provide a frame rate of 1000 Hz and 28 a sufficient spatial resolution to visualize the EW propaga-29 tion on a large 3-D surface. 30 Index Terms-3-D intracardiac echography (ICE), data 31 rate reduction, electromechanical wave imaging (EWI), high-32 frame-rate ultrasound imaging.
In this paper, a compact high-voltage (HV) transmit circuit for dense 2D transducer arrays used in 3D ultrasonic imaging systems is presented. Stringent area requirements are addressed by a unipolar pulser with embedded transmit/receive switch. Combined with a capacitive HV level shifter, it forms the ultrasonic HV transmit circuit with the lowest reported HV transistor count and area without any static power consumption. The balanced latched-based level shifter implementation makes the design insensitive to transients on the HV supply caused by pulsing, facilitating application in probes with limited local supply decoupling, such as imaging catheters. Favorable scaling through resource sharing benefits massively arrayed architectures while preserving full individual functionality. A prototype of 8 x 9 elements was fabricated in TSMC 0.18 µm HV BCD technology and a 160 µm x 160 µm PZT transducer matrix is manufactured on the chip. The system is designed to drive 65 V peak-to-peak pulses on 2 pF transducer capacitance and hardware sharing of 6 elements allows for an area of only 0.008 mm 2 per element. Electrical characterization as well as acoustic results obtained with the 6 MHz central frequency transducer are demonstrated.
In this paper, an application-specific integrated circuit (ASIC) for 3D, high-frame-rate ultrasound imaging probes is presented. The design is the first to combine element-level, high-voltage (HV) transmitters and analog frontends, subarray beamforming, and in-probe digitization in a scalable fashion for catheter-based probes. The integration challenge is met by a hybrid analog-to-digital converter (ADC), combining an efficient charge-sharing successive-approximation-register (SAR) first stage and a compact single-slope (SS) second stage. Application in large ultrasound imaging arrays is facilitated by directly interfacing the ADC with a charge-domain subarray beamformer, locally calibrating inter-stage gain errors and generating the SAR reference using a power-efficient local reference generator. Additional hardware-sharing between neighboring channels ultimately leads to the lowest reported area and power consumption across miniature ultrasound probe ADCs. A pitchmatched design is further enabled by an efficient split between the core circuitry and a periphery block, the latter including a datalink performing clock-data-recovery (CDR) and timedivision multiplexing (TDM), which leads to a 12-fold total channel-count reduction. A prototype of 8×9 elements was fabricated in TSMC 0.18-µm HV BCD technology and a 2D PZT transducer matrix with a pitch of 160 µm and a center frequency of 6 MHz was manufactured on the chip. The imaging device operates at up to 1000 volumes/s, generates 65-V transmit pulses and has a receive power consumption of only 1.23 mW/element. The functionality has been demonstrated electrically as well as in acoustic and imaging experiments.
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