A 0.65-V 2.5-GHz Fractional-N Synthesizer With Two-Point 2-Mb/s GFSK Data Modulation

Yu, Shih-An; Kinget, Peter R.

doi:10.1109/jssc.2009.2023156

Cited by 56 publications

(25 citation statements)

References 43 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…So the proposed techniques can lead to lower nonlinearity and phase noise of VCO than that in Ref. [1]. The Q of MIM capacitor is much higher than that of varactor, so the Q of .…”

Section: Proposed Techniquesmentioning

confidence: 91%

“…The voltage V GS (V G -V S ) across the varactor used for coarse tuning is ±V DD , which is twice as much as that in Ref. [1]. The total value C S of C 0 and C C in series is shown in equation (1) and derivation of C S is shown in equation (2).…”

Section: Proposed Techniquesmentioning

confidence: 93%

“…To increase the output frequency tuning range in low voltage VCO, switched varactor techniques have been used in Reference [1], but it requires that the gate voltage (V OP , V ON ) of varactor is biased at half of the power supply to fully exploit the capacitance variation [2] shown in Fig. 2 (a).…”

Section: Proposed Techniquesmentioning

confidence: 99%

“…[1]. The total value C S of C 0 and C C in series is shown in equation (1) and derivation of C S is shown in equation (2). When the value of C C is equal to C 0 at V GS =0 V, dC S /dV GS is 1/4 of dC 0 /dV GS around V GS =0 V. The lower the dC s /dV GS is, the smaller the varactor nonlinearity [5,6].…”

Section: Proposed Techniquesmentioning

confidence: 99%

“…The higher Q of varactor leads to higher Q of LC tank, so the proposed techniques can lead to higher output amplitude and lower power consumption of VCO [5,6] than that in Ref. [1]. As a result, the proposed techniques can be used for coarse tuning of low voltage VCO.…”

Section: Proposed Techniquesmentioning

confidence: 99%

See 4 more Smart Citations

A 0.5V 0.18µm CMOS LC-VCO with a novel switched varactor technique

Wang

et al. 2013

IEICE Electron. Express

View full text Add to dashboard Cite

A 0.5 V LC-VCO implemented in 0.18 m CMOS with a novel switched varactor technique is described in this paper. This novel switched varactor technique can increase the varactor control voltage variation range and increase Q of LC tank; also it can reduce phase noise and power consumption of VCO. Forward-body bias technique is used to reduce the threshold voltage and improve g m of transistor. The measured operating current is 4.4 mA and the tuning range is 4.6～5.2 GHz. The phase noise is À114 dBc/Hz at 1 MHz from carrier frequency 4.8 GHz.

show abstract

“…So the proposed techniques can lead to lower nonlinearity and phase noise of VCO than that in Ref. [1]. The Q of MIM capacitor is much higher than that of varactor, so the Q of .…”

Section: Proposed Techniquesmentioning

confidence: 91%

Section: Proposed Techniquesmentioning

confidence: 93%

Section: Proposed Techniquesmentioning

confidence: 99%

Section: Proposed Techniquesmentioning

confidence: 99%

Section: Proposed Techniquesmentioning

confidence: 99%

See 3 more Smart Citations

A 0.5V 0.18µm CMOS LC-VCO with a novel switched varactor technique

Wang

et al. 2013

IEICE Electron. Express

View full text Add to dashboard Cite

show abstract

Fractional‐N PLL

2023

Phase‐Locked Loops

View full text Add to dashboard Cite

A 2.4‐GHz frequency synthesizer with a discrete‐time sample‐hold‐reset loops filter

Huang

Lai

Yang

2014

Micro & Optical Tech Letters

View full text Add to dashboard Cite

A 2.4‐GHz integer‐N frequency synthesizer is implemented in TSMC 0.18‐μm CMOS process. This article proposes a charge pump (CP) linearization technique and uses a current‐switching differential Colpitts VCO to lower the phase noise and an averaged varactor circuit to increase the linearity of the VCO tuning range. A three phase sample‐hold‐reset loop filter that isolates the CP output node from the VCO tuning node, which improves synthesizer spur performance, minimizes phase noise and reduces on‐chip capacitors area. At 1.8 V supply voltage, measured results of the proposed prototype achieves a wide tuning range from 2.24 to 2.42 GHz, corresponding to 7.7%, a phase noise of −114.76 dBc/Hz at 1 MHz offset frequency from 2.4 GHz, a power consumption of 13.6 mW and an output power of −8.43 dBm. Including pads, the chip area only occupies 0.849 (0.899 × 0.944) mm2. © 2014 Wiley Periodicals, Inc. Microwave Opt Technol Lett 56:2591–2598, 2014

show abstract

A 0.65-V 2.5-GHz Fractional-N Synthesizer With Two-Point 2-Mb/s GFSK Data Modulation

Cited by 56 publications

References 43 publications

A 0.5V 0.18µm CMOS LC-VCO with a novel switched varactor technique

A 0.5V 0.18µm CMOS LC-VCO with a novel switched varactor technique

Fractional‐N PLL

A 2.4‐GHz frequency synthesizer with a discrete‐time sample‐hold‐reset loops filter

Contact Info

Product

Resources

About