A 0.4V ultra low-power UWB CMOS LNA employing noise cancellation

Parvizi, Mahdi; Allidina, Karim; Nabki, Frédéric; El-Gamal, M.N.

doi:10.1109/iscas.2013.6572354

Cited by 17 publications

(24 citation statements)

References 9 publications

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“…W is the effective channel width, L is the effective channel length, μ 0 is the carrier mobility, C OX is the [6]. (b) Noise cancelling complementary current-reuse LNA [9]. (c) Differential CG LNA using capacitor cross-coupling and FBB [11].…”

Section: A Threshold Voltage Reductionmentioning

confidence: 99%

“…M3 forms the tunable active shuntfeedback loop, and inductors L 1 and L 2 provide zero-voltage drop current sources. Inductive g m -boosting is implemented by placing an inductor L 3 at the gate of M1 [9]. This boosts the effective g m of the device at the resonant frequency of inductor L 3 and the gate-source capacitance of M1 and enhances the bandwidth, gain, and input matching of the LNA, without additional power consumption or noise contribution.…”

Section: Lna Circuit Descriptionmentioning

confidence: 99%

“…An ULP transconductance boosting scheme helps overcome this challenge, and becomes necessary when operating at high frequencies. g m -boosting can be achieved without any additional power consumption by adding an inductor at the gate of a CG transistor to boost its g m at the resonant frequency of the inductor and the parasitic gate-source capacitance [9]. To verify this scheme, the effective transconductance (G m, eff ) of a CG transistor is found with and without an inductor at its gate.…”

Section: Inductive G M -Boosting Techniquementioning

confidence: 99%

“…While the LNA presented in [6] does achieve sub-mW power consumption, the intrinsic tradeoff between input matching and voltage gain/NF in the resistive shunt-feedback architecture makes it very difficult to achieve power consumption below 0.5 mW [13]- [15]. The current-reuse technique, inductive g m boosting, and noise cancellation in [9] lead to the realization Fig. 1.…”

Section: Introductionmentioning

confidence: 99%

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Short Channel Output Conductance Enhancement Through Forward Body Biasing to Realize a 0.5 V 250 0.6–4.2 GHz Current-Reuse CMOS LNA

Parvizi

Allidina²,

El-Gamal

2016

IEEE J. Solid-State Circuits

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This work examines the use of a forward body biasing (FBB) scheme to mitigate output conductance degradation due to short channel effects in ultra-low voltage (ULV) circuits with no additional power consumption. It is shown that FBB boosts the output resistance of a transistor such that the intrinsic gain reduction due to low-supply voltages can be compensated. This technique is then used to implement a low-noise amplifier (LNA) tailored for ultra-low power (ULP) and ULV applications. The proposed LNA uses common-gate (CG) NMOS transistors as input devices in a complementary current-reuse structure. Low-power input matching is achieved by employing an active shunt-feedback architecture while the current of the feedback stage is also reused by the input transistor. Moreover, a separate FBB scheme is exploited to tune the feedback coefficient. An inductive g m-boosting technique is used to increase the bandwidth of the LNA without additional power consumption. The proposed LNA is implemented in an IBM 0.13 µm 1P8M CMOS technology and occupies 0.39 mm 2 . The measured LNA has a 14 dB gain, 4 dB minimum noise figure, IIP3 of −10 dBm, and 0.6-4.2 GHz bandwidth, while consuming only 500 µA from a 0.5 V supply. The LNA operates with supplies as low as 0.4 V while maintaining good performance. Index Terms-Current-reuse, forward body bias (FBB),inductive gm-boosting, low-noise amplifier (LNA), short channel effect mitigation, tunable active shunt-feedback, ultra-low power (ULP), ultra-low voltage (ULV). His research interests include ultra-low power IC design, MEMS-based microsystems, advanced packaging, and efficient high-volume test and calibration strategies. Mourad N. El-Gamal (S'92-M'99) received the B.Sc. (Hons.) degree from Ain-Shams University, Cairo, Egypt, in 1987, the M.Sc. degree (minor in computer science) from Vanderbilt University,

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Section: A Threshold Voltage Reductionmentioning

confidence: 99%

Section: Lna Circuit Descriptionmentioning

confidence: 99%

Section: Inductive G M -Boosting Techniquementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Short Channel Output Conductance Enhancement Through Forward Body Biasing to Realize a 0.5 V 250 0.6–4.2 GHz Current-Reuse CMOS LNA

Parvizi

Allidina²,

El-Gamal

2016

IEEE J. Solid-State Circuits

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“…Some of the LNA designs concentrating on low power technology are reported in [31][32][33][34][35][36][37][38][39][40][41]. Two LNAs each operating with 0.4 mW ultra-low-power is reported in [31,32]. In [31], inductive g m -boosting is employed whereas in [32], double g m -enhancement and feed-forward noise cancellation (FFNC) is employed respectively.…”

Section: Introductionmentioning

confidence: 99%

An ultra-low-power low-noise amplifier using cross-coupled positive feedback for 5G IoT applications

2019

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The wireless communication in the next generation is bound to be driven by massive machine-type communication or in other words Internet-of-things (IoT). In the near future, the need for effective communication and higher data processing rates will require IoT devices to support 5G networks. For 5G IoT applications in the ultra-wideband range (3.1-10.6 GHz), the analog receivers must provide both high-performance and energy efficiency simultaneously. This work addresses the demands of 5G IoT analog receivers by proposing an ultra-low-power low noise amplifier (LNA) employing cross-coupled positive shunt feedback. The proposed LNA is designed in UMC 180 nm deep n-well process, and the post-layout characterization is done using Cadence SpectreRF. The proposed design achieves a peak gain of 9.94 dB and a noise figure of 3.2-1.086 dB along the usable bandwidth of 3.2-9.625 GHz while consuming an ultra-low-power of 493 µW from a 1-V power supply. The maximum input-referred third-order intercept point of 8.81 dBm is attained for an input signal at 2.4 GHz and the interferer as close as 2.425 GHz. The LNA consumes a minimal layout area of only 676.2 µm × 350.7 µm. The proposed LNA has the better figure-of-merit while consuming almost 50% less power than the recently reported sub-mW LNA in literature.

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Noije

2021

Ultra-Low Voltage Low Power Active-Rc Filters and Amplifiers for Low Energy RF Receivers

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A 0.4V ultra low-power UWB CMOS LNA employing noise cancellation

Cited by 17 publications

References 9 publications

Short Channel Output Conductance Enhancement Through Forward Body Biasing to Realize a 0.5 V 250 0.6–4.2 GHz Current-Reuse CMOS LNA

Short Channel Output Conductance Enhancement Through Forward Body Biasing to Realize a 0.5 V 250 0.6–4.2 GHz Current-Reuse CMOS LNA

An ultra-low-power low-noise amplifier using cross-coupled positive feedback for 5G IoT applications

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