900MHz to 1.2GHz Two-Phase Resonant Clock Network with Programmable Driver and Loading

Chueh, Juang-Ying; Sathe, Visvesh; Papaefthymiou, Marios C.

doi:10.1109/cicc.2006.320995

Search citation statements

Order By: Relevance

Paper Sections

Select...

Introduction1

Citation Types

Supporting

Mentioning

Contrasting

Year Published

2007

2022

Publication Types

Select...

Other2

Article2

Relationship

Self Cite1

Independent3

Authors

Journals

Cited by 4 publications

(1 citation statement)

References 3 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In that design, however, the application of resonant clocking was limited to 978-1-4244-4353-6 /09 /$ 25 .00 ©2 0 0 9 IEEE global clock distribution, without driving flip-flops, resulting in limited overall power savings. Resonant clocking for GHz-speed global clock distribution was investigated in [2,4]. A highspeed 10 cell with resonant clocking was described in [7].…”

Section: Introductionmentioning

confidence: 99%

A resonant-clock 200MHz ARM926EJ-S<sup>TM</sup> microcontroller

Ishii¹,

Kao²,

Sathe³

et al. 2009

2009 Proceedings of ESSCIRC

Self Cite

View full text Add to dashboard Cite

An ARM926EJ-S™ microcontroller with a fully resonant clock distribution network and 16KB data and instruction caches has been implemented in 130nm bulk silicon. Workloads execute successfully across process and temperature corners, and at room temperature, typical-process chips run at clock speeds up to 200MHz with I.2V supply. At resonance, the microcontroller core dissipates 0.23mW/MHz, recovering 85% of the energy in its clock distribution network. Total power savings range from 20% to 35%, depending on application workload and computation profile.

show abstract

Section: Introductionmentioning

confidence: 99%