Optical Fiber Communication Conference and Exhibit 2002
DOI: 10.1109/ofc.2002.1036577
|View full text |Cite
|
Sign up to set email alerts
|

8 Gb/s CMOS compatible monolithically integrated silicon optical receiver

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
4
1

Citation Types

0
6
0

Year Published

2004
2004
2006
2006

Publication Types

Select...
4
2

Relationship

0
6

Authors

Journals

citations
Cited by 8 publications
(6 citation statements)
references
References 4 publications
0
6
0
Order By: Relevance
“…Since our laser sources only achieve a finite extinction ratio (EX) of 7, these values were corrected by subtracting 1.25 dB to get the sensitivities for a light source with infinite EX. For example, with 660 nm, BER , and Table I, and for a BER of , an average power of 23.5 dBm at 660 nm and 21.2 dBm at 850 nm were necessary (compare with 21 dBm at 2 Gb/s with a second supply voltage of 27 V [7]). No difference in the sensitivity was found between the case that the PD voltage was generated on chip by the low-noise CP and the case that the PD voltage was supplied from an off-chip battery.…”
Section: A Optical Receivermentioning
confidence: 99%
See 3 more Smart Citations
“…Since our laser sources only achieve a finite extinction ratio (EX) of 7, these values were corrected by subtracting 1.25 dB to get the sensitivities for a light source with infinite EX. For example, with 660 nm, BER , and Table I, and for a BER of , an average power of 23.5 dBm at 660 nm and 21.2 dBm at 850 nm were necessary (compare with 21 dBm at 2 Gb/s with a second supply voltage of 27 V [7]). No difference in the sensitivity was found between the case that the PD voltage was generated on chip by the low-noise CP and the case that the PD voltage was supplied from an off-chip battery.…”
Section: A Optical Receivermentioning
confidence: 99%
“…This boosts the drift velocity as long as the saturation velocity is not reached and the SCR is not further widened. The lateral p-i-n PDs on silicon-on-insulator (SOI) [4]- [7] also required a higher voltage from outside of the chip. The PDICs of [4] and [5] used an nMOS technology also supplying depletion transistors.…”
Section: Introductionmentioning
confidence: 99%
See 2 more Smart Citations
“…These slow tails of the photocurrent can be suppressed if base-collector diodes in standard-buried collector bipolar technology are used as a detector, but due to the thin epitaxial layer, capacitance is high and quantum efficiency is low, leading together to a poor sensitivity [2]. In [3,4] lateral photodiodes were implemented in a SOI technology in a thin silicon layer, whereby the slow diffusion currents generated deep in the substrate are blocked due to the insulating buried oxide layer. For these thin photodiodes the quantum efficiency is low (10%) leading to a low sensitivity.…”
Section: Introductionmentioning
confidence: 99%