2006
DOI: 10.1109/tcsii.2006.882354
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A 2.5-Gb/s Receiver PDIC With Low-Noise Integrated Charge Pump

Abstract: A single-chip optical receiver with integrated voltage-up-converter for speed enhancement of the photodiode in a 0.6-m silicon BiCMOS technology with = 25 GHz is presented. It incorporates a vertical p-i-n photodetector with responsivities of 0.36 and 0.26 A/W at 660 and 850 nm, respectively. Using an on-chip low-noise charge pump (CP; OUT = 12 V) at a bit rate of 2.5 Gb/s and a bit error rate of 10 9 , sensitivities of 23.5 and 21.2 dBm are obtained for 660 and 850 nm, respectively. The basics of the current-… Show more

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