65-nm node photomask etching with zero CD process bias

Abstract

A robust photomask etching process was studied and developed for 65 nm node photomask production with zero CD process bias. The fabrication process, including pattern generation and transfer do not use data sizing, saving photomask delivery time, improving yield, and reducing fabrication costs. The photomask patterns, without using data sizing cover chrome loads from about 1 percent to 80 percent. For 65 nm critical layer EAPSM, the CD bias of Cr and MoSi etching together is equal to or less than about 20 nm for high and low load photomasks. The etch process and dose adjustment on the 50 keV e-beam writer allow for zero CD process bias, i.e. the data sizing becomes unnecessary in the 65 nm node photomask fabrication. The SMIF pot utilization in both pattern generation and transfer processes significantly improved the defectivity control. Cr and MoSi etch endpoints of 1% load photomasks were clearly detected. Point-to-point CD etch contributions for dark and clear features are 5 nm (3 sigma) or less and final CD value ranges are 8 nm or less. CD etch linearity and other etch properties on SRAF and serif are also discussed. An equation was proposed for calculating phase angle non-uniformity distribution, and phase angle range can be controlled in the range of 1.4 0.3 degree. "Selfmask", i.e. using AR sub-layer as hard mask for beneath chromium sub-layer etch was also discussed.