4 Gbps On-Chip Interconnection using Differential Transmission Line

Highly Energy-Efficient On-Chip Pulsed-Current-Mode Transmission Line Interconnect

“…Maximum bit-rate comparable to that of TLIs can be achieved by using RC lines in a bundle; however, this would imply that the RC lines will occupy virtually the same area as the TLIs. The area per bit of the proposed point-to-point PTLI is almost equal to that of the other point-to-point TLIs Ito et al, 2005;Ishii et al, 2006;Ito et al, 2007Ito et al, , 2008Lee et al, 2004). The area per bit of the proposed multi-drop PTLI is the equal to the bidirectional and multi-drop transmission line interconnects (Ito et al, 2008).…”

Inter-symbol interference (ISI) in on-die transmission lines

“…Various approaches have been proposed and analyzed. Differential transmission lines in various configurations were designed and tested, and it was concluded that these lines provided enormous on-chip signaling bandwidth and could be used for global signaling at gigabit rates [1,2]. However, the lines were implemented for a 180 nm technology node, where drawbacks, such as active losses, skin effect, etc.…”

“…1) have been proposed for implementation of differential on-die transmission lines by standard metal layers [1]. In our work, a stacked and a diagonal pair structures were used to implement single-ended on-die transmission lines.…”

“…An important parameter of a transmission line is its characteristic impedance Z C that is given by: (1) where R stands for the line active losses and C L, and G are the characteristic line inductance, capacitance and dielectric conductance per unit length, respectively. For lossless or low loss lines, 0 ≅ ≅ G R and therefore C L Z C ≅ , and the line characteristic impedance is frequency independent.…”

A Multi-Drop Transmission-Line Interconnect in Si LSI

“…Table I shows delay of the proposed and conventional onchip interconnects, and the proposed interconnect is the fastest. Figure 8 shows power consumptions of the proposed interconnect that has a Tx and two Rxs, a peer-to-peer differentialtransmission-line interconnect [3] and a peer-to-peer RC line [4]. The proposed interconnect achieves the lowest power and delay from 1.5 to 4 Gbps although it has a branch.…”