1990
DOI: 10.1049/el:19901077
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3.2 GHz, 0.2 μm gate CMOS 1/8 dynamic frequency divider

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Cited by 8 publications
(2 citation statements)
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“…Furthermore, [2] stated that the device complexity of a dynamic prescaler is about one third smaller than the complexity of the static prescaler. This is clearly seen in Figure 7.…”
Section: Dynamic Vs Staticmentioning
confidence: 99%
See 1 more Smart Citation
“…Furthermore, [2] stated that the device complexity of a dynamic prescaler is about one third smaller than the complexity of the static prescaler. This is clearly seen in Figure 7.…”
Section: Dynamic Vs Staticmentioning
confidence: 99%
“…However, [2] claimed that the disadvantage of the dynamic divider is the high minimum operating frequency, Fmin which is greater than 1 GHz due to offcurrent leakage in the transistors. Hence, a static divider should be cascaded after the dynamic divider to enable the signal frequency to be divided to even lower frequencies.…”
Section: Dynamic Vs Staticmentioning
confidence: 99%